In aluminum interconnect rework, residual Ti/TiN films from physical vapor-deposited stacks are removed in a recirculated wet bench after dry metal etch, usually on wafers carrying patterned AlCu lines with exposed W plugs and low-κ dielectric. A common volumetric starting bath is HF 49% : H2O2 30% : ultrapure water = 1:1:5 operated at 23–25°C. Hydrogen peroxide oxidizes TiN to a mixed titanium oxide/oxynitride state, while fluoride converts the oxidized titanium and underlying Ti adhesion film into soluble hexafluorotitanate species. The etch cell is constructed from PFA or PVDF wetted parts, with 0.1 µm cartridge filtration and continuous recirculation to remove suspended Ti-containing particles. Nitrogen blanketing of the reservoir suppresses carbonate absorption and dampens self-decomposition of peroxide; bath make-up water complies with ASTM D5127-13, and chemical transfer is performed inside an ISO 14644-1:2015 Class 5 cleanroom. Endpoint control relies on time-to-clearing plus a fixed over-etch, because TiN etch rate varies with film stoichiometry, oxygen incorporation, and PVD magnetron power. In production, cross-section SEM of etched aluminum lines confirms that the W plug is not recessed and that no Ti residue remains at the AlCu/TiN interface. Published data for a universal etch rate is limited, because each fab's deposition tool and prior plasma process create a distinct surface state. The bath is also sensitive to dissolved iron and copper; trace cations at low parts-per-billion levels can catalyze peroxide decomposition and increase particle counts on patterned wafers.

The wet bench is fitted with temperature interlocks and peroxide decomposition venting; if the bath exceeds 28°C, the local exhaust system removes oxygen and acid vapor, and the run is paused until the reservoir returns to setpoint. Bath aging is tracked by free fluoride titration and dissolved Ti analysis. Once dissolved Ti approaches the fab-specific control limit, particle nucleation on TiN residues increases sharply; the bath is dropped and recharged to prevent front-end wafer scrap from metallic residues. The terminal output is a patterned aluminum interconnect wafer ready for dielectric liner deposition or subsequent via processing. For copper metallization, this bath is not used on exposed porous low-κ films unless the dielectric porosity is sealed, because capillary absorption of fluoride-containing solution can shift k-value and create via poisoning failures.

What Limits Selective Ti Etching in Wafer-Level Packaging UBM Stacks?

The under-bump metallization stack at 40 µm pitch and below normally comprises sputtered Ti or Ti/TiN as an adhesion and diffusion barrier layer beneath electroplated copper or copper pillar structures. After copper pillar plating and photoresist stripping, the Ti/TiN seed layer is wet-etched to electrically isolate pillars and redistribute lines. A more dilute bath than front-end cleaning is often used, with a volumetric ratio of HF 49% : H2O2 30% : ultrapure water = 1:1:15 to 1:1:20 at 25°C. The lower peroxide and fluoride activity reduces lateral undercut under the copper pillar and limits dissolution of exposed Cu. Selectivity is characterized on sputtered Cu blanket films using immersion coupon procedures based on ASTM G31-12a and electrochemical polarization per ASTM G59-97; the resulting Tafel data identify the passivity window for the Cu/Ti galvanic couple. In high-volume bump lines, the bath is spiked only with the oxidizer and fluoride components after inductively coupled plasma mass spectrometry confirms the dissolved Ti concentration remains below the fab-specific threshold. Azole-based passivation is preferred for exposed copper; ammonia-based additives are avoided because copper-amine complexation accelerates open-circuit copper loss and shifts Cu pillar sidewall roughness beyond the post-plating inspection limit. The terminal component is a wafer with clean Ti/TiN-free UBM pads ready for solder paste printing or ball attach. Undercut acceptance is set by the package reliability build, and no single universal sidewall loss value applies; fabs verify by SEM cross-section of daisy-chain dies before bumping.

In some package designs, the TiN barrier thickness exceeds 100 nm. A single diluted bath may not clear the film within the allowable exposure window before copper pillar sidewall attack occurs. Such stacks are split into a two-step sequence: a brief TiN conversion dip, a deionized water rinse, and then a final diluted fluoride maintenance step. The split time is set following SEM inspection of the pillar foot. The process is incompatible with exposed aluminum bond pads on the same wafer; if aluminum pads are present outside passivation openings, the etchant must be locally delivered or the pad areas protected with a chemically resistant resist.

When TiN Serves as an Etch Stop During Sacrificial Oxide Release

For surface-micromachined inertial sensors and microbolometers, TiN is frequently deposited as an etch stop or hardmask over polysilicon prior to sacrificial oxide release. After buffered HF or vapor HF release of the oxide, residual Ti/TiN must be stripped without collapsing the released proof mass or roughening exposed silicon anchors. A low-total-fluoride bath at HF 49% : H2O2 30% : ultrapure water = 1:1:25 is used at 20°C, with immersion times short enough to avoid excessive Si loss. Mechanical agitation is limited to gentle recirculation because megasonic energy can fracture micromechanical beams and cause stiction-related yield loss. Wetted components include PFA cassettes and PVDF tanks, and the rinse sequence uses a graded ultrapure water overflow to prevent re-deposition of titanium fluoride complexes. The terminal products are released MEMS accelerometer proof masses, comb-drive structures, and gyroscope sense elements. For some TiN film stoichiometries, the wet etch rate depends strongly on compressive stress and grain boundary density; when a fab changes sputtering target condition, the time-to-clear must be re-qualified on patterned wafers with optical or interferometric measurement. Particle control is performed in an ISO 14644-1:2015 Class 5 environment, and the post-release rinse is monitored by particle counting of the final overflow stream to confirm that suspended titanium oxide is below the line-specific limit. Published data for specific TiN configurations in MEMS release is limited, so each device team maintains an internal monitor wafer history rather than relying on supplier-generated etch-rate curves.

After wet stripping, the released MEMS wafer typically proceeds to a deionized water rinse and CO2 supercritical drying in a dedicated process chamber. The etchant is not used on released structures with exposed aluminum sacrificial layers because the fluoride component attacks aluminum; such flows require substitution with an inhibitor-modified formulation or a mask sequence that protects the Al features.

Compound semiconductor emitter and power device flows expose the Ti/TiN adhesion layer under Au contacts, Pt/Au gates, or Ni/Au bond pads. After the metal stack is patterned by liftoff or dry etch, a diluted Ti/TiN etch bath removes the residual adhesion film without attacking exposed GaAs, InP, AlGaAs, or GaN. A typical processing point is HF 49% : H2O2 30% : ultrapure water = 1:2:25 at 20–22°C, applied in a single-wafer spray processor with PFA plumbing and 0.05 µm point-of-use filtration. The higher water content lowers the hydrogen fluoride activity and narrows the removal window on III-V surfaces, while the peroxide fraction assists TiN conversion. Process control uses sacrificial witness wafers or coupon material from the same deposition chamber; ellipsometry or X-ray fluorescence confirms the residual Ti thickness after timed exposure. The terminal outputs include VCSEL arrays, distributed-feedback laser facets, and GaN power transistor contact windows. Operation is conducted in an ISO 14644-1:2015 Class 5 cleanroom with incoming ultrapure water per ASTM D5127-13. Hydrogen peroxide can roughen GaAs and InP surfaces at extended exposure, so spray times are kept within the qualified exposure window and the chamber is immediately flushed with nitrogen-sparged ultrapure water. The use of non-amine inhibitors is preferred because amine-containing formulations can alter the selectivity on As-based materials. Published data for these specific bath ratios on all III-V alloy combinations is limited, and fab-specific split-lot qualification is required before transfer to production.

Managing TiN Hardmask Removal in MRAM and Thin-Film Head Manufacturing

Magnetoresistive random-access memory and thin-film recording head fabrication use TiN as a conductive hardmask on magnetic tunnel junction or GMR stacks. After ion beam or reactive ion etching, a final wet clean removes TiN residues and residual Ti adhesion material. A dilute formulation at HF 49% : H2O2 30% : ultrapure water = 1:1:20 is maintained at 25°C for short immersion times, with no ultrasonic or megasonic agitation due to magnetic layer corrosion sensitivity. The bath is filtered through 0.05 µm polytetrafluoroethylene membranes, and the recirculation loop is designed to avoid dead legs where particulate Ti oxide can accumulate. The wet clean is typically followed by a deionized water rinse and vapor drying to prevent watermark defects on the magnetoresistive stack. Wetted parts are PFA or PVDF; stainless steel components are excluded because fluoride-containing vapor can corrode 316L pump heads and introduce iron contamination. The terminal products are MRAM pillars and read/write head elements before subsequent encapsulation and top electrode deposition. A key operational boundary is process time: extended exposure to acidic fluoride etchants can corrode CoFeB, NiFe, or synthetic antiferromagnetic layers and shift magnetoresistance. The process ownership team measures blanket TiN etch rate on monitor wafers after each sputter target change, because TiN grain size and density directly control the wet removal endpoint. Published data for this specific configuration is limited, so the etch window is re-qualified with cross-section transmission electron microscopy on sacrificial device wafers.

Flat-Panel Display Gate-Metal Rework and Line Integrity

On large glass substrates for advanced LCD or OLED backplanes, Ti/TiN may serve as a barrier and adhesion sub-layer beneath copper gate or source-drain lines. After copper wet etch or after photo rework, the Ti/TiN underlying film is removed in a puddle or spray coater cell using a highly dilute bath around HF 49% : H2O2 30% : ultrapure water = 1:1:30 at 30°C. The low fluoride concentration reduces attack on the underlying silicon nitride or silicon oxide gate insulator during the clearing step. Recirculation and temperature control are configured for large-area uniformity, typically with linear dynamic pressure control along the spray manifold and continuous particle filtration through 0.2 µm cartridges. The terminal product is a glass backplane with clean Ti/TiN-free footprints where the copper gate electrodes remain intact. Process qualification includes electrical test of TFT structures to measure threshold voltage shift and leakage current after treatment, and X-ray photoelectron spectroscopy on monitor glass confirms the absence of residual Ti. The etchant bath is replenished by conductivity and pH titration rather than fixed calendar time, because dissolved titanium and fluoride depletion shift etch rate on large substrate cassettes. A restriction on this chemistry is the exposure of exposed aluminum electrodes on the same panel; if the panel design includes Al pads outside the passivation window, the etchant must be masked or replaced with a locally patterned delivery head. Published data for specific display-grade TiN stacks is limited, and each backplane line adjusts the formulation based on the deposition tooling and pixel pitch.