| HS Code | 842568 |
| Product Name | Polysilicon Etch Electronic/EL Grade |
| Chemical Composition | Mixture of hydrofluoric acid, nitric acid, and acetic acid with proprietary additives |
| Physical State | Liquid |
| Appearance | Clear, colorless to slightly yellowish solution |
| Etch Rate | Controlled, typically 1000-3000 Å/min for polysilicon |
| Selectivity | High selectivity to silicon dioxide and silicon nitride |
| Metal Impurities | Each metal impurity less than 1 ppb |
| Particulate Count | Less than 100 particles per milliliter (>0.5 μm) |
| Density | Approximately 1.05-1.10 g/cm³ at 20°C |
| Flash Point | Greater than 100°C (closed cup) |
| Boiling Point | Approximately 110°C (as packaged) |
| Solubility | Fully miscible with water |
| Shelf Life | 12 months from date of manufacture when stored properly |
| Storage Temperature | 15-25°C in sealed HF-resistant containers |
As an accredited Polysilicon Etch Electronic/EL Grade factory, we enforce strict quality protocols—every batch undergoes rigorous testing to ensure consistent efficacy and safety standards.
| Packing | Supplied as a 1-gallon high-density polyethylene bottle, securely sealed, maintaining EL-grade purity for polysilicon etching applications. |
| Container Loading (20′ FCL) | 20′ FCL loading of Polysilicon Etch Electronic/EL Grade: secure, clean, moisture-proof packaging to protect ultra-high-purity chemical integrity. |
| Shipping | Ship Polysilicon Etch Electronic/EL Grade as dangerous goods: UN 2922, Corrosive Liquid, Toxic, n.o.s. (contains hydrofluoric acid and nitric acid), Class 8 (6.1), Packing Group II. Package in approved corrosion-resistant containers with corrosive/toxic labels; secure upright, ventilated, and follow IATA/IMDG/49 CFR regulations. |
| Storage | Store in original, tightly sealed, HF-compatible containers (polyethylene or PTFE) in a cool, dry, well-ventilated area. Keep away from direct sunlight, moisture, and incompatible materials such as metals, alkalis, and oxidizers. Use chemical-resistant secondary containment to prevent leaks. Maintain container integrity and cleanliness to protect electronic/EL-grade purity. Inspect regularly. Ensure emergency eyewash and ventilation are accessible. |
| Shelf Life | Stored unopened in original containers under cool, dry, ventilated conditions, Polysilicon Etch Electronic/EL Grade typically has a shelf life of one year. |
Front-end integrated circuit manufacturing for logic, DRAM, and 3D NAND uses electronic/EL grade polysilicon etch in the gate-definition module after photoresist develop and descum. The chemistry is metered into a PFA single-wafer spray tool or a temperature-controlled recirculation bench where the bath make-up is held at 1 part concentrate to 2.5–4.0 parts ultrapure water by volume; the diluting water is specified to ASTM D5127 Type E-1 or equivalent. Operating temperature is 21–23 °C with continuous 0.2 μm point-of-use filtration and fluoropolymer heat exchange to suppress the exotherm from nitric acid oxidation of the silicon surface. Wetted components are PFA and PTFE; stainless steel is excluded because free fluoride ions attack the passive oxide layer. Tool exhaust is routed through a packed-bed scrubber for HF and NOx abatement. Typical etch rate for n-type polysilicon is 0.45–0.75 μm/min, and isotropic undercut is held below 0.12 μm per side by endpoint control and a chilled DI water dump rinse. The metal-budget boundary is set by SEMI C1 reagent specifications for trace cations and by SEMI C7 for hydrofluoric acid-containing chemistries; wafer transfer occurs under ISO 14644-1:2015 Class 3 or tighter conditions. Bath life is limited to 8–10 hours or 120–160 wafers, whichever occurs first, because nitrite accumulation and photoresist dissolution products shift etch uniformity, raise solution viscosity, and require bath replacement. Segregation from ammonia-containing stripper waste is required to avoid precipitation of ammonium hexafluorosilicate in drain lines. The terminal outputs are CMOS logic, DRAM, and NAND devices with polysilicon gate lengths below 28 nm; the same bath may also be used for polysilicon stringer removal after main dry etch.
| Bath make-up ratio | Bath temperature | Measured etch rate | Cross-wafer non-uniformity |
|---|---|---|---|
| 1:2.5 | 21 °C | 0.60–0.75 μm/min | 6–8% |
| 1:3.0 | 22 °C | 0.50–0.65 μm/min | 5–7% |
| 1:4.0 | 23 °C | 0.45–0.55 μm/min | 4–6% |
In low-temperature polysilicon (LTPS) thin-film transistor backplane fabrication for AMOLED and high-resolution LCD, the electronic/EL grade polysilicon etch is fed through a large-area multi-nozzle spray tool at a volumetric blend of 1 part concentrate to 3–5 parts ultrapure water. The polysilicon film thickness is usually 50–70 nm, and the etch step must remove the unwanted silicon completely while limiting silicon dioxide loss to 2–3 nm; this drives the need for bath temperature control at 22–25 °C with a stability of ±0.5 °C. Reaction-rate sensitivity in this range is approximately 8–12% per kelvin, so recirculation loops use heat exchangers with feedback from an inline thermocouple and a specific-gravity cell. The spray tool chemical delivery system uses a double-wall PFA tank and a pulsation-free bellows pump; point-of-use filtration at 0.1 μm prevents nozzle clogging. On production lines, etch non-uniformity is measured on Gen 8.6 monitor glass by stylus profilometry or X-ray fluorescence; the specification is below 5% (3σ) for channel dimension control. The downstream sequence is pre-cleaning with dilute hydrofluoric acid, polysilicon etch, chilled DI water rinse, and hot air knife drying before photoresist strip. Compliance is anchored to SEMI C1 trace-metal limits, SEMI S2 equipment safety reviews for exhaust management of HF and NOx, and ISO 14644-1:2015 Class 5 backplane patterning areas. Terminal products are AMOLED displays and LTPS-based high-resolution LCD modules used in smartphones, tablets, notebook panels, and automotive instrument clusters.
MEMS foundries running silicon surface micromachining sequences use electronic/EL grade polysilicon etch for isotropic wet patterning of polysilicon structural films where device design can tolerate a sloped sidewall and where dry plasma equipment is not justified. Bath preparation reduces the etch rate by mixing 1 part concentrate with 1–2 parts ultrapure water, producing an etch rate of 0.15–0.30 μm/min at 20–22 °C. Lower concentration is preferred because it reduces photoresist undercut and improves wafer-to-wafer repeatability across a batch of 25 wafers in a Teflon or PVDF immersion tank with gentle agitation. The immersion tank is covered with a nitrogen sweep to minimize NOx emission and reduce water vapor uptake. The production process includes HMDS vapor priming, spin-coated photoresist patterning, timed immersion etch with intermittent withdrawal for inspection, a two-stage DI water rinse, and isopropyl alcohol vapor drying to minimize stiction of released polysilicon microstructures. Compliance follows SEMI C1 trace-metal limits, SEMI S2 for etch tool safety, and ISO 13485 when the devices are integrated into medical-grade sensor modules; manufacturing control charts track silicon dioxide loss on witness wafers to maintain undercut below 0.8 μm. The terminal products are accelerometers, gyroscopes, pressure sensors, and MEMS microphones for consumer, automotive, and medical monitoring applications.
In n-type TOPCon photovoltaic manufacturing, electronic/EL grade polysilicon etch is used after crystallization of the passivating poly-Si layer to remove wraparound deposition from wafer edges and from the front side if dielectric masking is incomplete. The chemical is blended with ultrapure water at 1:2 to 1:4 by volume in a sealed dosing cabinet and supplied to a horizontal inline spray tool at 18–25 °C; batch immersion is used only in lines with tight wafer-handling control because the exothermic reaction on phosphorus-doped polysilicon can create local temperature non-uniformity and increase undercut beneath the silicon nitride or silicon oxide mask. The production sequence follows low-pressure chemical vapor deposition of polysilicon, high-temperature crystallization, and single-side protection; the rear surface is exposed to the etch while the front junction side is shielded by a water film or a temporary mask. Removal per pass is typically 0.3–0.8 μm of poly-Si at 25 °C, with endpoint verified by sheet-resistance mapping or photoluminescence rather than by visual clearing. Fluoride waste is precipitated with calcium chloride and filtered in a filter press; final effluent is monitored for fluoride below 5 mg/L before discharge. Compliance includes REACH registration for hydrofluoric acid-containing mixtures, ISO 14001 for waste neutralization and fluoride abatement, and IEC 61215 qualification when the cells are assembled into modules; particulate filtration at 1.0 μm is retained to reduce shunt path formation. Published data for this specific configuration remains limited because most cell producers regard the etch formula as proprietary; the ranges cited reflect production-line tool qualifications rather than public literature. The terminal products are n-type TOPCon solar cells and glass-packaged photovoltaic modules for utility-scale and rooftop arrays.
Power semiconductor lines running discrete MOSFETs and IGBTs apply the same electronic/EL grade polysilicon etch in two separate stages: wet stringer removal after polysilicon gate dry etch and edge-bead removal before silicide formation. Gate-pattern bath make-up is 1 part concentrate to 2.5–3.5 parts ultrapure water, with bath temperature controlled at 22–24 °C and etch rate held at 0.50–0.80 μm/min across 150 mm and 200 mm substrates. The production sequence begins with polysilicon deposition over gate oxide, photoresist patterning, fluorine-based main etch, and a short wet etch to clear residual polysilicon stringers at the field edge; the same bath is then used as a low-pressure peripheral spray to remove backside and edge redeposited silicon that would otherwise degrade subsequent silicide contact resistance. Compliance follows SEMI C1 trace-metal specifications and ISO 14644-1:2015 Class 5 or better; free fluoride and nitric acid concentration are sampled every 4 hours. Terminal products are discrete power MOSFETs, IGBTs, and smart power integrated circuits packaged for industrial motor drives, switched-mode power supplies, and automotive power modules.
In 300 mm wafer reclaim operations, the same electronic/EL grade polysilicon etch chemistry is repurposed to remove redeposited polysilicon films after thin-film deposition tool qualification. The segment operates under different economics from device patterning: a single batch may process 50–100 wafers, and the bath is diluted to 1:3 to 1:6 with ultrapure water to keep the etch rate near 0.2–0.4 μm/min and limit surface roughening. The production process comprises photoresist and organic residue strip, polysilicon etch in a temperature-controlled Teflon tank at 25–30 °C, oxide removal in dilute hydrofluoric acid, RCA clean, and re-polish if wafer thickness loss exceeds the reclaim threshold. Compliance is anchored to SEMI C1 incoming chemical purity and ISO 14644-1:2015 Class 4 final inspection; wafers are rejected when vapor phase decomposition inductively coupled plasma mass spectrometry detects copper or iron above 1×1010 atoms/cm². Terminal products are reclaimed silicon test and monitor wafers returned to lithography, deposition, or etch tool qualification loops.
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Polysilicon Etch Electronic/EL Grade is a pre-blended, low-particle isotropic wet etch chemistry supplied for controlled removal of polycrystalline silicon films on 200 mm and 300 mm device wafers. The formulation is prepared from electronic-grade nitric acid (70 wt% HNO₃), electronic-grade hydrofluoric acid (49 wt% HF), and electronic-grade acetic acid, with volumetric proportions adjusted to produce removal rates in the 0.2 µm/min to 1.5 µm/min range at 20–25 °C. Supplier model coding generally records the blend ratio and purity class; the Electronic/EL classification is controlled by trace metal, anion, and particle specifications rather than by a single universal stoichiometry. The product is differentiated from technical-grade mixed acids by cation limits commonly set at ≤ 50 ppb total and ≤ 10 ppb per critical element, by point-of-use filtration through 0.1 µm or 0.05 µm polytetrafluoroethylene membranes, and by filling under ISO 14644-1 Class 5 or better cleanroom conditions.
The nitric acid component is qualified against SEMI C8, the hydrofluoric acid component against SEMI C7, and the acetic acid component against SEMI C9; these raw acid inputs are blended after submicrometer filtration and then recertified for trace metals by inductively coupled plasma mass spectrometry and for anions by ion chromatography. Dilution and rinse water used in bath makeup conforms to ASTM D5127-13(2019) Type E-1 ultra-pure water requirements. Typical uses include blanket polysilicon removal after dry etch rework, isotropic trimming of polysilicon gate structures where controlled thermal oxide loss is acceptable, stripping of sacrificial polysilicon in surface micromachining, and wafer reclaim flows in which polysilicon films must be removed before subsequent bulk silicon processing. In single-wafer spray tools, endpoint is determined by optical reflectometry or by detecting exposure of the underlying silicon dioxide layer; because the acid mixture etches SiO₂ at a measurable rate, endpoint algorithms and timed etch windows are used rather than relying on near-infinite selectivity.
The etching mechanism is a two-step oxidation-dissolution sequence. Nitric acid oxidizes the silicon surface to hydrated silicon dioxide, and hydrofluoric acid converts the oxide to hexafluorosilicic acid. Nitrous acid generated as a reaction intermediate accelerates the oxidation step, producing autocatalytic etch rate drift in aged baths. The reaction is frequently mass-transport limited in acetic acid-diluted blends, so wafer rotation, bath agitation, and localized replenishment of HF at the wafer surface affect removal uniformity more strongly than small changes in bulk acid concentration. This transport sensitivity is why production spray processors use PFA and PTFE nozzles with radial wafer rotation, while recirculating immersion baths require overflow or sparging strategies to avoid stagnant boundary-layer buildup.
Electronic/EL grade is not defined by acid concentration alone. Technical-grade mixtures may contain total trace metals in the parts-per-million range, whereas electronic/EL lots are supplied with cation limits that are 100–1,000× lower. The blend is typically packaged in fluoropolymer-lined drums or bag-in-box systems that maintain low particle shedding during dispense. Lot certification includes trace metal, anion, and particle data, and retain samples are archived for 12 months. The following representative specification profile is used for incoming material qualification; supplier-specific certificates of analysis should be consulted for exact values.
| Parameter | Representative Limit | Method/Standard Basis |
|---|---|---|
| HNO₃ input assay | 68–71 wt% | SEMI C8 acid titration |
| HF input assay | 48–50 wt% | SEMI C7 |
| Acetic acid input purity | ≥ 99.8% | SEMI C9 |
| Total trace metals | ≤ 50 ppb | ICP-MS |
| Critical cation per element | ≤ 10 ppb for Fe, Ni, Cu, Cr, Na, K | ICP-MS |
| Chloride | ≤ 1 ppm | Ion chromatography |
| Sulfate | ≤ 1 ppm | Ion chromatography |
| Particle count at 0.2 µm | ≤ 100 particles/mL | Laser particle counter |
| Blended density | 1.20–1.35 g/cm³ | Digital densitometer |
| Undoped polysilicon removal rate at 22 °C | 0.2–1.5 µm/min | Rotating coupon immersion test |
Because the product contains free HF, natural rubber latex gloves and standard borosilicate glassware are incompatible. Wetted components are restricted to PTFE, PFA, PVDF, and select polyethylene or polypropylene grades. Cleanroom filling under ISO 14644-1 Class 5 or better reduces airborne particle contamination during packaging, and dispensing systems are usually fitted with 0.05 µm or 0.1 µm PTFE filters at point of use. Analytical methods for lot release include ICP-MS with detection limits below 1 ppb for transition metals, ion chromatography with suppressed conductivity detection for chloride and sulfate, and laser particle counting with a lower channel at 0.2 µm. Gravimetric or densitometer checks are used for blend ratio verification because small shifts in water content can move the etch rate outside the allowed process window.
Production-scale field experience indicates that etch bath aging is not governed solely by acid consumption. In recirculating systems charged with 200 L to 1,000 L of blended etch chemistry, the removal rate often increases by 20–40% over 4–6 h when the bath is held idle at 22 °C; this drift is attributed to accumulation of nitrous acid. Replenishment strategies therefore require continuous overflow, oxidizer adjustment, or temperature compensation rather than simple volumetric make-up. Wetted materials for storage and delivery are restricted to fluoropolymers such as PTFE, PFA, and PVDF; borosilicate glass and 316L stainless steel are incompatible because HF attacks silica and many alloys. In some wafer reclaim operations, inline conductivity and refractive index sensors are used to monitor acid concentration, while etch rate is verified daily by removing monitor wafers with known polysilicon thickness. From a defect-density standpoint, the particle content of the EL-grade product is a more immediate yield risk than its acid activity. A 0.2 µm particle lodged between photoresist and polysilicon can create a local etch shadow during rework, leaving a residual polysilicon island that shorts adjacent gates. Production particle counts in the blended material are therefore monitored after every point-of-use filter replacement and after any maintenance event that opens wetted lines. The cartridge filter itself is typically a hydrophobic PTFE membrane with a polypropylene support; filter change-out intervals are based on differential pressure increase rather than fixed calendar time.
Temperature and nitrite concentration interact to define the usable process window. At 20 °C, a given volumetric blend may remove undoped polysilicon at 0.4 µm/min; at 25 °C, the same blend can exceed 0.6 µm/min. This sensitivity requires closed-loop temperature control with recirculating chillers or low-volume spray processing, especially in tools where the chemical bath is reused across multiple lots. Etch rate also depends on dopant type and concentration: heavily n-type arsenic-doped polysilicon can etch slower than undoped material, and published data for this specific configuration is limited, so split-lot qualification is required for exact removal targets. Surface roughness after wet removal is typically evaluated by atomic force microscopy on 1 µm × 1 µm scan fields; production logs frequently show root-mean-square roughness below 0.5 nm for as-received EL grade but values can rise above 2 nm when the bath is contaminated by 10 ppb levels of iron or copper. Such contamination may originate from stainless steel fittings, robotic wafer handling residuals, or out-of-lot raw acid lots, and it is not always visible by color change. This is why SEMI C7, SEMI C8, and SEMI C9 raw acid cation limits are enforced at incoming inspection before blending.
In comparison with alkaline anisotropic etchants, Polysilicon Etch Electronic/EL Grade is selected when room-temperature operation and isotropic profile control are required. KOH at 30 wt% and 80 °C removes polysilicon at comparable rates but yields sharply defined (100)/(111) crystallographic planes, whereas the HF-HNO₃ system undercuts mask edges and produces rounded isotropic profiles. TMAH at 25 wt% offers lower alkali metal residue than KOH but generally requires elevated operating temperatures of 70–90 °C and exhibits reduced etch rates on heavily n-type doped polysilicon. The acid mixture introduces no alkali metals from the formulation, provided EL grade cation limits are maintained, but it offers lower selectivity to thermal SiO₂ than alkaline alternatives; therefore endpoint control is mandatory when etching polysilicon over thin gate oxide.
Compared with technical-grade mixed acids, Electronic/EL Grade reduces particle-related patterning defects and trace metal-induced surface roughness. Technical-grade HF and HNO₃ can contain transition metals such as Fe and Cu at concentrations 100–1,000× higher than the EL grade limits, and metallic contamination is known to degrade minority carrier lifetime and oxide integrity in device fabrication. This distinction is critical for gate-level rework and for wafer reclaim operations where the same silicon surface may later enter a front-end furnace or gate oxidation tool.
Substitution is not a direct drop-in change. Alkaline etchants such as KOH and TMAH require oxide or nitride hard masks, and their crystallographic selectivity produces sloped or faceted sidewalls rather than isotropic undercut. In contrast, the acidic EL-grade mixture etches silicon isotropically and can be used with photoresist masks in some rework applications, although resist adhesion and attack must be verified. Process temperature is also different: KOH and TMAH operate at 70–90 °C, requiring heated recirculating baths and vapor exhaust, whereas the acid mixture is typically operated at 20–25 °C. Alkaline chemistries provide higher selectivity to SiO₂ and are preferred when prior oxide thickness must be preserved; the acid blend is preferred when the oxide is sacrificial or when thermal oxide loss is acceptable within the process budget.
Table 2 summarizes the principal process metrics for selecting among the three chemistries. Values are representative ranges compiled from industrial wet etch datasheets and process literature; specific tool and film conditions require qualification.
| Process Metric | Polysilicon Etch EL Grade | KOH 30 wt% | TMAH 25 wt% |
|---|---|---|---|
| Etch profile | Isotropic | Anisotropic | Anisotropic |
| Operating temperature | 20–25 °C | 70–90 °C | 70–90 °C |
| Poly-Si etch rate | 0.2–1.5 µm/min | 0.5–2.0 µm/min | 0.4–1.2 µm/min |
| Thermal SiO₂ selectivity | Low; endpoint required | High; >100:1 | High; >100:1 |
| Alkali metal introduction | Not from formulation | Potassium | Low; trimethylammonium |
| Mask compatibility | Oxide, nitride, resist with verification | Oxide/nitride hard mask | Oxide/nitride hard mask |
| Typical application | Blanket rework, isotropic poly removal | MEMS cavities, V-grooves | Semiconductor-compatible anisotropic silicon etch |
Storage and handling boundaries must be enforced. The product is incompatible with ammonia, amines, strong reducing agents, and concentrated hydrogen peroxide due to exothermic reactions and toxic NOₓ gas release; segregated ventilation and acid waste plumbing are required. Sealed containers should be stored below 25 °C to limit nitric acid decomposition and HF outgassing. Spent material and rinse water require separate fluoride-containing waste treatment because municipal discharge limits for fluoride are commonly below 3 mg/L. The product should not be combined with sulfuric acid or hydrogen peroxide oxidizer systems in the same drain or tool without rigorous separation and rinse cycles, because mixed acids can generate aggressive etchants and complicate ion-exchange recovery. Packaging should be opened only in a designated acid fume hood with appropriate face protection, neoprene or butyl rubber gloves, and ANSI/ISEA Z358.1-compliant emergency eyewash and shower stations in proximity. Accidental water carryover from wet wafer carriers can dilute local HF and reduce etch rate; similarly, solvent residue from cleaning operations can alter surface wetting and produce non-uniform clearing. For these reasons, the etch process is constrained by wafer-carrier dry handling, low-humidity loading, and point-of-use particle checks after each maintenance interval.