In front-end-of-line isolation and spacer patterning, wet removal of LPCVD or PECVD silicon nitride hard masks is carried out in recirculating quartz or PTFE-lined baths charged with electronic/EL grade phosphoric acid at 85 wt% H₃PO₄. The bath is heated to a process window of 150–170 °C. Heating is supplied by quartz-sheathed resistive elements or fluoropolymer-coated immersion heaters. Water evaporates from the boiling acid and shifts the acid concentration upward. That shift alters the etch-rate ratio between silicon nitride and silicon dioxide. A level sensor or density controller adds deionized water in pulses to hold the acid concentration within ±0.5 wt% of set point. Temperature uniformity across the bath is held to ±1.0 °C. Nitride removal in this chemistry follows an Arrhenius dependence. A temperature rise of 2 °C can increase the bulk nitride etch rate by 10–20% while simultaneously increasing thermal oxide attack. Wet bench production data with inline spectroscopic ellipsometry indicate silicon nitride removal rates of 4–7 nm/min at 160 °C. Thermal oxide removal rates remain below 1 nm/min under the same conditions. Selectivity ratios fall between 5:1 and 10:1 for dense LPCVD nitride versus thermally grown oxide. The terminal structures after stripping are shallow trench isolation oxides, gate sidewall spacers, and sacrificial hard masks used in dual-damascene via etch. The acid is filtered continuously through 0.05 µm polypropylene or PTFE membrane cartridges. Filtration prevents particle deposition on exposed silicon or oxide surfaces. Bath life is limited by accumulation of silicon species. Silicon accumulation reduces nitride etch rate. Replacement is triggered when silicon concentration reaches the upper control limit established by in-line ICP-MS or wet etch rate monitor wafers. Incoming material is governed by SEMI C36. Analytical release includes ICP-MS for cation impurities, ion chromatography for chloride and sulfate, and laser particle counting for particles above 0.2 µm. Electronic/EL grade material with trace metal levels below 10 µg/L for alkali and alkaline-earth elements is mandatory for wafer surfaces with contact resistivity specifications below 1×10^-8 Ω·cm².

What Limits CD Loss in Phosphoric–Acetic–Nitric Aluminum Alloy Etch?

Aluminum and aluminum alloy interconnect wet etching in wafer fabs is performed with phosphoric-acetic-nitric etchants formulated from electronic/EL grade phosphoric acid, concentrated nitric acid, and acetic acid. A widely used volume ratio for Al/Si/Cu films is 16:1:1:2 for H₃PO₄ 85 wt%, HNO₃ 70 wt%, CH₃COOH 99.8 wt%, and deionized water. Production recipes shift to 4:1:1:4 or 10:1:1:2 depending on linewidth and undercut tolerance. The bath is held at 35–45 °C in a fully vented polypropylene or PVDF wet bench. Continuous filtration through 0.1 µm cartridges removes precipitates and particles. A typical etch rate for Al-1%Si films under these conditions falls between 0.5–1.0 µm/min. The rate is not linear with time. Nitric acid passivates the exposed metal. Acetic acid reduces surface tension and removes hydrogen gas bubbles. Uniformity across a 200 mm wafer is maintained within ±5% by recirculating the bath at 10–20 L/min. Nitrogen is injected into the bottom plenum. Endpoint detection is accomplished by optical emission spectroscopy monitoring the aluminum atomic emission line near 396.1 nm or by temperature-compensated conductivity sensors at the bath outlet. The product structures include aluminum bond pads, M1 and M2 interconnect lines in legacy CMOS, and gate and source lines in power semiconductor and MEMS microbolometer arrays. Deviation in H₃PO₄ assay above 85.5 wt% increases viscosity and reduces wetting. Dilution below 83.0 wt% slows etch initiation and widens undercut during long overetch steps. The H₃PO₄ source must meet SEMI C36 grade cation and anion limits. Iron concentrations above 50 µg/L in the acid can lead to electrochemical pitting on aluminum-copper alloys. Chloride above 100 µg/L can induce post-etch corrosion on exposed silicon areas. Batch-to-batch variation is controlled by gravimetric blending and by titration against sodium hydroxide with potentiometric endpoint detection. Records are traceable to the lot certificate of analysis.

Phosphoric Acid–Nitric Acid ITO Patterning in Display and Touch Sensor Fabrication

For indium tin oxide transparent conductor layers in liquid crystal display, fringe-field switching LCD, and projected capacitive touch modules, wet patterning uses phosphoric acid–nitric acid mixtures when hydrochloric acid-bearing etchants would attack underlying molybdenum/aluminum bus metallization. The EL grade acid is blended with 70 wt% nitric acid and deionized water to produce a working bath with H₃PO₄ content in the 10–20 wt% range and HNO₃ content in the 1–5 wt% range. Process temperature is maintained at 38–45 °C in a spray or immersion etcher equipped with high-density polyethylene or PTFE plumbing and a 0.2 µm particle filter. ITO removal rates under these conditions typically fall between 20–60 nm/min for sputtered amorphous ITO with thickness of 100–200 nm. Endpoint is detected by optical transmittance change at 550 nm or by sheet resistance rise above 1 MΩ/sq on the open area. The phosphoric acid component reacts with indium oxide to form soluble phosphate species. Nitric acid oxidizes tin oxide at the surface and accelerates indium dissolution. The resulting taper angle at the edge of the ITO electrode is controlled in the range of 30–60° by adjusting acid ratio and temperature. A lower H₃PO₄ content produces a steeper profile with longer overetch stability. A higher H₃PO₄ content increases lateral etch and smooths the edge. Critical process limits include the accumulation of dissolved indium. When indium concentration in the bath exceeds 1 g/L, etch rate drifts downward and precipitate formation appears on the substrate. Bath regeneration or replacement is required. Filtration through 0.05–0.1 µm membranes does not remove dissolved indium. Continuous waste treatment with pH neutralization and precipitation is used in production lines. The terminal products are indium tin oxide pixel electrodes, common electrodes, bridge conductors, and touch sensor arrays on glass or flexible polyimide substrates. Incoming phosphoric acid must comply with SEMI C36 for trace metals. Chromium, nickel, and copper levels above 10 µg/L can alter ITO etch initiation on alkali-free display glass and produce visible staining that is detected by dark-field inspection. Exact etch-rate values depend on ITO crystallinity and tin oxide doping ratio. Published data for specific proprietary formulations is limited.

In chemical mechanical planarization of tungsten contact plugs and interlayer dielectric films, electronic/EL grade phosphoric acid is metered into slurry blending skids as a pH adjuster and buffering agent. The acid is drawn from a chemical distribution system through stainless steel or PTFE lines into a day tank where slurry concentrate, oxidizer, and deionized water are combined. Target slurry pH for acidic tungsten slurries is held within 2.0–3.0. Oxide bulk slurries containing fumed silica often operate at pH 2.5–3.5. Phosphoric acid provides a buffering plateau around its first dissociation constant, pK_a1 2.15. This buffer capacity resists pH drift from pad debris and dissolved wafer species. In-line pH analyzers with temperature compensation and automatic injection valves maintain the set point within ±0.05 pH. Slurry particle stability is verified by measuring the zeta potential of silica or alumina abrasives. At pH below 3.0, the particle surface charge depends on formulation and may remain positive or near-neutral. Electrostatic repulsion prevents gelation and agglomeration. The addition rate of H₃PO₄ is typically below 0.5 wt% of final slurry mass. Lot-to-lot variation in fumed silica surface area and silanol group density requires adjustment of the acid dosing curve. The main semiconductor failure mode associated with poor acid quality is metallic contamination. Sodium, calcium, and iron cations in the phosphoric acid incorporate into the chemically modified surface layer of the polished oxide and can shift mobile ion drift parameters in subsequent reliability tests. The acid source is controlled to ≤10 µg/L for sodium and potassium and ≤5 µg/L for iron and copper. Analytical reports are generated by ICP-MS according to SEMI C36. Filtration of the blended slurry through a 0.5 µm depth filter removes large agglomerates. Flow rate through the polishing platen is adjusted to 200–300 mL/min for a 300 mm polisher. The terminal products are planarized tungsten plug arrays, oxide intermetal dielectrics, and copper barrier CMP layers where phosphoric acid-based additives function as corrosion inhibitors for copper at low pH.

When Gallium Arsenide and Indium Phosphide Mesas Require Selective Wet Etching

Phosphoric acid–hydrogen peroxide–water solutions are used in III-V compound semiconductor fabrication for mesa isolation, gate recess, and selective removal of GaAs, InGaAs, and AlGaAs layers. A baseline volume ratio of 1:1:25 H₃PO₄ 85 wt%, H₂O₂ 30 wt%, and deionized water produces GaAs removal at controlled rates. Increasing the peroxide fraction to 1:1:5 or decreasing water to 1:1:10 raises the etch rate and changes crystallographic anisotropy. The bath is operated inside an exhaust hood with continuous scrubbing. A chilled water loop keeps the bath at 20–25 °C. Etch depth is measured by stylus profilometry on dummy substrates and by in-line laser interferometry on production wafers. Depth uniformity across a 150 mm wafer is maintained within ±5% by magnetic stir-bar agitation or spray impingement. The phosphoric acid content controls undercutting of AlGaAs layers. The hydrogen peroxide content governs surface oxide formation on aluminum-containing layers. In selective gate recess processes for InP-based high electron mobility transistors, H₃PO₄:H₂O₂:H₂O mixtures with ratios near 1:1:40 are used because the etch stops on an underlying InAlAs or InP layer. Etch-stop tolerance is confirmed by electrochemical capacitance-voltage and cross-sectional transmission electron microscopy. Bath life is short, typically 4–8 hours. Hydrogen peroxide decomposes and water evaporates. Etch rate therefore shifts. Batch-to-batch control requires replenishment of peroxide based on iodometric titration or etch-rate monitor strips. The terminal products are laser diode mesas, photodetector ridges, HEMT gate recesses, and heterojunction bipolar transistor emitter structures. Electronic/EL grade acid for III-V processing must meet trace metal specifications no higher than 10 µg/L for chromium, copper, and zinc. Transition metals act as deep-level dopants in the compound semiconductor and degrade carrier lifetime. Quantitative selectivity data for specific heterostructures is often limited to vendor etch-rate monitor results rather than public standardized data.

Production-Scale Quartzware Cleaning Depends on Low Particle Phosphoric Acid

To maintain defect density below reclaim limits, production-scale quartzware cleaning and wafer reclaim operations use electronic/EL grade phosphoric acid to strip silicon nitride and polysilicon residues from furnace liners, dummy wafers, and quartz boats. Hot H₃PO₄ at 150–165 °C removes nitride deposits on quartzware. Continuous immersion of quartz parts requires periodic thickness checks to avoid quartz etching beyond 0.5 µm/hour. The acid is held in a quartz tank with a drain trap to collect silicon debris. Wafer reclaim of test wafers with residual nitride or oxide layers blends 5–15 vol% H₃PO₄ with sulfuric acid and hydrogen peroxide to reduce particle counts below 30 particles/wafer at a 0.2 µm threshold. Bath replacement is triggered by silicon concentration. In-line ICP-OES monitors silicon accumulation and diverts spent acid to neutralization. The terminal products are cleaned furnace quartzware and reclaimed monitor wafers for lithography and etch tool requalification.