In rigid multilayer PCB fabrication, inner-layer patterning uses selective copper removal from epoxy-glass cores before lamination. Guanghua Technology Acidic Etchant, Electronic/EL Grade, is run in horizontal conveyorized spray etchers with titanium or PVC/CPVC wetted parts; Type 316L stainless steel is excluded because chloride pitting initiates within 200–500 h of continuous contact. The control band for the cupric chloride system is typically maintained at 120–180 g/L cupric ion, 150–220 g/L free hydrochloric acid, specific gravity 1.25–1.35, and temperature 48–52 °C. Spray pressure across cone nozzles is held between 0.8 bar and 1.2 bar. Oxidation-reduction potential is controlled at 520–560 mV versus Ag/AgCl; potentials above 580 mV accelerate lateral attack and degrade etch factor, while readings below 500 mV reduce vertical etch rate enough to require longer dwell time and produce rough sidewalls. The primary redox cycle converts metallic copper to cuprous chloride, after which air sparging or metered sodium chlorate regenerates cupric chloride. Free acid is monitored by acid-base titration rather than pH because concentrated chloride media destabilise membrane pH electrodes and produce drift. Cooling coils and heat-exchanged recirculation loops are required to keep the bath temperature within ±2 °C, because etch rate changes by approximately 4–6% per °C in this window.

Breakpoint is maintained at 55–65% of chamber length so that the remaining spray zone acts as a controlled over-etch stage. Dry-film photoresist of 38 µm thickness withstands the acid environment for typical contact times not exceeding 180 s; protective edge erosion is checked after first-article panels. Cross-sectional measurements following ASTM B487-85 quantify vertical etch depth and lateral undercut, and the etch factor for inner-layer traces at 75 µm line pitch is commonly 2.5–3.5. After stripping and automated optical inspection, the cores proceed to brown oxide or black oxide coating and subsequent multilayer stack lamination. Acceptance of conductor width and spacing is referenced to IPC-6012F for Class 3 inner layers, with final qualification also conditioned by IPC-4101E base material requirements. The downstream product is a registered inner-layer core set used in high-layer-count server, telecom, and aerospace multilayer constructions.

What Limits Undercut Control in Flexible Roll-to-Roll Etching?

Flexible circuit production laminates or deposits 18 µm, 12 µm, or 9 µm copper onto polyimide film, then processes the web through roll-to-roll etchers at 250–520 mm width and 2–8 m/min speed. The etchant temperature is intentionally constrained to 45–50 °C, which is lower than rigid-board ranges, to reduce dimensional movement of the polyimide carrier and to limit hydrochloric acid vapour carry-over into downstream rinse sections. Low trace-cation loading in Electronic/EL Grade is significant for adhesiveless cast-on-polyimide constructions; iron above 1 mg/L can participate in local galvanic cells at the copper-polyimide interface and generate isolated pitting. Free chloride is held at the upper end of 180–220 g/L to maintain cuprous chloride solubility and prevent precipitation on horizontal chamber seals and lip rollers. Web tension is controlled by dancer rolls ahead of the etch chamber; tension variation greater than ±5% causes width change that later appears as misregistration during coverlay or stiffener lamination. Post-etch copper sidewall roughness is typically held between Ra 0.20 µm and Ra 0.30 µm to balance coverlay adhesion against flexural fatigue life. The etched flex core may become a single-sided, double-sided, or multilayer flexible printed circuit used in smartphones, medical catheters, automotive dashboards, and foldable display links. Compliance commonly references IPC-6013D for flexible circuit performance and IPC-4562A for incoming copper foil, with undercut verified by optical cross-section at 400× magnification after first-piece approval.

After pattern plating of a modified semi-additive process (mSAP) or semi-additive process, the exposed copper seed layer is removed without converting the plated circuit profile into a strongly trapezoidal shape. In this step the seed copper is typically 0.5–3 µm thick, while the plated copper feature is 8–18 µm thick. Because the acidic etchant does not chemically distinguish seed copper from plated copper under practical operating conditions, geometric uniformity and short residence time dominate the process. Horizontal flash-etch modules for mSAP use fixed nozzle arrays with 0.5 mm orifice diameters and spray pressure below 0.6 bar to minimise puddling, which otherwise causes preferential etching in narrow spaces. Cupric ion is maintained at 80–120 g/L, free HCl at 160–200 g/L, ORP at 540–570 mV, and temperature at 47–50 °C. The lower copper concentration improves etch uniformity when only a thin seed must be removed. Endpoint is determined by colour change sensors or optical densitometry; an over-etch allowance of 10–20% of seed thickness is typical. Finished HDI boards with line/spacing of 20/20 µm or 15/15 µm then proceed to organic solderability preservative or ENIG surface finish. Cross-sectional verification uses ASTM B487-85, and the dielectric surface between traces is held below Ra 0.25 µm by non-contact profilometry. Acceptance is commonly tied to IPC-6016D for HDI constructions.

Mobile cation control is particularly important because mSAP traces are separated by thin carbon dioxide laser-drilled dielectric and are later subjected to biased humidity testing. Sodium and iron concentrations above 0.5 mg/L can form conductive residues after downstream ENIG or immersion tin processing. Rinse conductivity after etching is therefore monitored and held below 10 µS/cm before panels exit the final cascade. The process is incompatible with brass or bronze fittings in the recirculation loop because cupric chloride attacks copper alloys. End product examples include smartphone mainboards, tablet motherboards, and high-density camera module substrates.

When Package Substrate Traces Drop Below 12 µm, the Etch Factor Requirement Becomes Process-Defining

Flip-chip and wire-bond package substrates built on BT or ABF laminates use semi-additive processing. The residual copper seed between pattern-plated traces is removed on horizontal etchers; the acid etchant must produce an etch factor above 4 for line/spacing 12/12 µm and above 6 for 8/8 µm. At these geometries, 1 µm of lateral attack per side consumes a disproportionate share of the conductor width. Electronic/EL Grade low sodium and low iron content is preferred because mobile ion contamination on package substrates can degrade wire-bond adhesion and highly accelerated stress test performance. Free chloride is held at 170–210 g/L, cupric ion at 90–130 g/L, ORP at 530–560 mV, and temperature at 48–50 °C. A closed-loop regeneration circuit injects hydrogen peroxide or sodium chlorate in proportion to copper loading; hydrogen peroxide addition above 3.0 mL/L per regeneration cycle is avoided because hot oxidizer can passivate copper and induce non-uniform flash etch. After etching, the substrate proceeds to desmear, electroless copper, electrolytic copper, and solder mask. End product qualification may include JEDEC JESD22-A110 highly accelerated stress testing and IPC-6016D or IPC-6012F Class 3 acceptance. The final package substrate may be ENEPIG-finished for wire bonding or used as a direct flip-chip pad surface.

One operational boundary is the accumulation of chlorate in low-bleed systems. When sodium chlorate is used as the primary oxidizer and the drag-out rate is small, chlorate can exceed 5 g/L and contribute to resist lifting at the trace edge. Bleed-and-feed or electrolytic copper recovery controls the build-up. The etch bath is also incompatible with elastomer seals containing nitrile rubber; perfluoroelastomer or EPDM seals are required for continuous duty above 1000 h.

Heavy-Copper Boards and the Chloride Exotherm Constraint

Copper thickness above 105 µm on power boards changes the etch process from a short pass to a sustained exothermic reaction. On horizontal equipment, panel temperature may rise 6–10 °C across a single pass when etching 210 µm foil unless the etch sump includes external cooling sized to hold the bath within ±2 °C of setpoint. The etchant is operated at lower ORP, 510–540 mV, and higher cupric ion, 150–180 g/L, to reduce lateral attack while maintaining vertical etch. Free HCl is held at 150–180 g/L; higher acid concentration attacks resist edges and lowers etch factor. Spray bar oscillation at 20–30 cycles/min prevents puddling in dense high-current patterns. End product examples include power converter busbars, IGBT module substrates, motor drive boards, and thermal management layers. After etch, panels are inspected by X-ray thickness measurement for trapped cuprous chloride deposits in narrow gaps. If cuprous chloride precipitates, an immediate acid flush at twice the normal HCl concentration is required before the line stops to prevent solidification in the spray manifold. Acceptance criteria for conductor thickness and width commonly follow IPC-6012F Class 3, with thermal stress test IPC-TM-650 2.6.7 used to validate copper integrity after solder float.

A process limitation with heavy copper is the low throughput relative to thin-foil etching. Conveyor speed for 210 µm copper may be as low as 0.2–0.5 m/min depending on chamber length and nozzle pressure. Rack systems are sometimes preferred over conveyorised units when panel distortion exceeds 0.5% after etching. The bath also accumulates copper quickly; copper concentration must be bled or fed to an electrowinning loop to stay below 180 g/L. If copper rises above that limit, cupric chloride crystallisation can occur in cool zones of the sump and recirculation piping.

Controlled impedance boards used in 5G antenna arrays and automotive radar modules require etched line widths to remain within ±5 µm of the CAM design, because characteristic impedance shifts by roughly 1–2 Ω per 3 µm width change on thin laminates. Etch uniformity therefore becomes more important than absolute etch rate. The acid etchant is run in high-flow vertical spray chambers with 50–100 L/min per nozzle row to create a uniform boundary layer across the panel. ORP is maintained at 530–560 mV with automated oxidizer dosing; cupric ion is held at 100–140 g/L, free HCl at 160–190 g/L, and temperature at 49–51 °C. In-line dimension measurement after resist stripping provides closed-loop adjustment of conveyor speed and spray pressure. The trapezoidal cross-section is minimised by shortening etch time and increasing vertical etch rate, but over-aggressive chemistry attacks the nodular copper surface and raises conductor loss. Post-etch surface roughness is targeted below Ra 0.35 µm. Downstream products include 77 GHz radar antenna boards, low-loss RF modules, and high-speed digital backplanes. Verification references IPC-2221A for conductor width design and IPC-TM-650 2.5.5.7 for impedance, with final single-ended acceptance typically 50 Ω ± 5 Ω.

The process window is narrow when high-frequency laminates are not glass-reinforced or contain low-loss fillers; the etchant can attack exposed filler particles at the sidewall, so spray pressure above 1.0 bar is avoided on such materials. Pre-etch surface preparation must remove chromate or silane treatment from the copper foil; otherwise the breakpoint becomes erratic. Rinse water conductivity below 10 µS/cm is required to prevent ionic contamination on the dielectric, which would shift effective dielectric constant under humidity.