| HS Code | 473854 |
| Abrasive Type | Colloidal Silica |
| Abrasive Concentration | 30% |
| Average Particle Size | 70 nm |
| Solids Content | 30% |
| Density | 1.1 g/cm3 |
| Viscosity | 2.5 cP |
| Oxide Removal Rate | 2500 Å/min |
| Within Wafer Non Uniformity | <5% |
| Metal Impurities | <1 ppb each |
| Shelf Life | 12 months |
| Storage Temperature | 5-25 °C |
As an accredited ILD Polishing Slurry Electronic/EL Grade factory, we enforce strict quality protocols—every batch undergoes rigorous testing to ensure consistent efficacy and safety standards.
| Packing | Packaged in 4-liter HDPE cubitainer with inner bag, nitrogen purge, and tamper-evident seal. Electronic/EL grade ensures high purity. |
| Container Loading (20′ FCL) | 20′ FCL: 20-foot container loaded with drums/IBCs of EL-grade ILD polishing slurry, secured, sealed, and labeled for safe transport. |
| Shipping | Ship as a non-hazardous liquid in sealed plastic drums or IBC totes, protected from freezing, extreme heat, and contamination. Ensure containers are upright and clearly labeled “Electronic Grade – Handle with Care.” Avoid mixing with other chemicals, and use spill-containment measures during transport. Verify current SDS for any regulatory updates before shipping. |
| Storage | Store ILD Polishing Slurry Electronic/EL Grade in tightly sealed original containers in a clean, cool, dry area between 5–25°C. Protect from freezing, direct sunlight, and temperature extremes. Keep away from incompatible materials and ensure good ventilation. Avoid contamination, and follow first-in, first-out rotation to maintain particle stability and product performance. |
| Shelf Life | Shelf life is typically 6 months from manufacture when stored at controlled temperature, sealed, and protected from freezing or contamination. |
ILD Polishing Slurry Electronic/EL Grade is supplied as a 12 wt% colloidal silica concentrate with a median secondary particle size of 35–50 nm and a stock pH of 11.0–11.3. In 300 mm logic wafer fabrication, the slurry is diluted with ultrapure water meeting ASTM D5127-13 Type E-1.2 at a volumetric ratio of 1.0:1.0, yielding a working total solids content of 5.5–6.5 wt% and a working pH of 10.8–11.2. HDP-CVD silicon dioxide films with a deposited thickness of 800–1,200 nm are planarized on a 300 mm polisher equipped with a polyurethane pad having Shore D hardness of 52–58, platen speed of 85–95 rpm, carrier downforce of 3.0–3.5 psi, backpressure of 1.5 psi, and slurry flow of 180–220 mL/min. Endpoint control is maintained by motor current change and optical thickness measurement, with post-polish within-wafer non-uniformity held below 3%. Compliance at the point of use includes ISO 14644-1:2015, Clause 5 Class 5 cleanroom conditions, SEMI S2-0221 and SEMI S8-0221 for slurry delivery equipment safety, and REACH (EC) No 1907/2006 for substance registration. The terminal finished product is a logic integrated circuit wafer with planarized interlayer dielectric prior to contact etch and tungsten plug formation.
Ceria-based ILD slurry in shallow trench isolation operates under a pH window that is narrower than commonly understood. When the 1:2 dilution of EL Grade slurry in ultrapure water meeting ASTM D5127-13 Type E-1.1 produces a ceria solids concentration of 0.8–1.5 wt% and a working pH of 4.8–5.5, the oxide-to-silicon nitride selectivity remains above 25:1 on high-density plasma oxide trench fills with a depth of 250–350 nm. A proprietary anionic polymer dispersant is present at a concentration below 0.2 wt%; when the pH drifts above 5.8, the zeta potential changes and selectivity deteriorates due to ceria aggregate formation on the pad surface. The STI CMP step is executed on a 300 mm polisher with a grooved polyurethane pad, platen speed of 70–90 rpm, carrier downforce of 2.0–3.0 psi, slurry flow of 150–250 mL/min, and diamond conditioning before each wafer lot. Post-polish active area nitride thickness loss is held below 10 nm, while oxide dishing in the trench is limited to <20 nm. The dispense loop is qualified under SEMI S2-0221, SEMI S8-0221, and ISO 14644-1:2015, Clause 5 Class 4 controlled zones. The terminal finished product is a DRAM wafer with STI-isolated transistor active areas and a planar surface enabling subsequent wordline and capacitor module integration.
Conventionally processed 200 mm power management wafers receive a borophosphosilicate glass film with a thickness of 800–1,200 nm before contact lithography. For pre-metal dielectric planarization, the ILD slurry is diluted 1:1.5 with deionized water, resulting in a working silica solids content of 7.0–9.0 wt% and a working pH of 10.5–11.0. The slurry is dispensed at 120–180 mL/min on a single-wafer polisher with platen speed of 60–80 rpm and downforce of 3.5–4.5 psi; endpoint is triggered by motor current change after removal of 80–95% of the initial step height. Compliance for this application includes SEMI S2-0221, REACH (EC) No 1907/2006, and RoHS 2011/65/EU, with a cleanroom classification of ISO 14644-1:2015, Clause 5 Class 5. The terminal finished product is a power management integrated circuit wafer for DC-DC converters, LDO regulators, and gate driver circuits with a planarized pre-metal dielectric layer.
When the number of stacked wordline tiers in 3D NAND exceeds 64, the cumulative step height in the terrace region makes oxide planarization a critical constraint. For this application the EL Grade slurry is diluted 1:3 with ultrapure water, reducing total solids to 3.0–4.0 wt% and lowering the working pH to 10.0–10.5; the reduced solids concentration suppresses removal rate to 1,500–2,500 Å/min, which is necessary to maintain post-CMP step height variance below 30 nm. Process parameters on a 300 mm polisher include platen speed of 50–70 rpm, downforce of 1.5–2.5 psi, backpressure of 1.0 psi, slurry flow of 100–150 mL/min, and optical endpoint from an integrated thickness monitor. Delamination risk at nitride/oxide interfaces is controlled by limiting downforce below 2.5 psi; failure to maintain this boundary produces edge peeling on tiers with high residual stress. The dispense loop is qualified under SEMI S2-0221, SEMI S8-0221, and ISO 14644-1:2015, Clause 5 Class 4, with each batch supplied with REACH-compliant documentation. Published data for specific tier-count configurations remains limited; individual fab qualification is required. The terminal finished product is a 3D NAND memory wafer with 96–232 stacked tiers and planarized dielectric terraces prepared for subsequent tier-level lithography.
Wafer reclaim lines processing silicon test wafers use the EL Grade slurry for thermal oxide removal after stripping metal and nitride layers. The slurry is diluted 1:5 with ASTM D5127-13 Type E-1.2 water, dispensed at 300–400 mL/min on a high-throughput reclaim polisher, resulting in a removal rate of 5,500–7,000 Å/min on densified thermal oxide. Compliance for reclaim operations includes SEMI S2-0221 and REACH (EC) No 1907/2006; the facility is typically maintained at ISO 14644-1:2015, Clause 5 Class 5. The terminal finished product is a reclaimed bare silicon test wafer suitable for process qualification and monitor wafer reuse.
Devices fabricated by bulk micromachining require sacrificial oxide planarization before dry release. The ILD slurry is diluted 1:1, giving a working solids content of 5.0–6.0 wt% at pH 10.0–10.5, and is applied to PECVD oxide films with thickness of 1.5–2.5 µm. The CMP process uses a 150 mm or 200 mm carrier, platen speed of 40–60 rpm, downforce of 1.0–2.0 psi, and slurry flow of 80–120 mL/min; the low downforce prevents sub-surface damage in the underlying silicon device layer. Endpoint is determined by optical interferometry after a target removal of 300–500 nm of sacrificial oxide. The dispense system is qualified under SEMI S2-0221 and ISO 14644-1:2015, Clause 5 Class 5, with RoHS compliance per 2011/65/EU. The terminal finished product is a MEMS inertial sensor wafer with uniform sacrificial oxide thickness and released comb drive structures.
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ILD Polishing Slurry Electronic/EL Grade is an aqueous colloidal silica chemical mechanical planarization dispersion formulated for interlayer dielectric oxide planarization in front-end-of-line logic and memory fabrication. The model designation used for lot traceability is ILD-PS-EL-30, with the suffix indicating a nominal solids content of 30 wt%. The pH at 25 °C is 10.8, maintained by an alkali hydroxide buffer system. The electronic/EL designation applies to the trace-metal profile: sodium is controlled to ≤ 100 ppb, iron to ≤ 10 ppb, and copper to ≤ 5 ppb by inductively coupled plasma mass spectrometry. The dispersed phase is colloidal silica with a volume-weighted mean diameter of 70 nm and a D90 of 105 nm. In the polishing zone, the alkaline medium hydrolyzes the oxide surface while silica particles remove the softened layer, producing a planarized dielectric surface.
| Parameter | Test Method | Representative Value |
|---|---|---|
| Solids content | Gravimetric, 105 °C dry | 30 wt% ± 1 wt% |
| pH at 25 °C | ASTM E70-19 | 10.8 ± 0.2 |
| Mean particle diameter D50 | ISO 22412:2017 | 70 nm ± 5 nm |
| Particle diameter D90 | ISO 22412:2017 | 105 nm |
| Large particle count ≥ 0.5 µm | Single-particle optical sizing | < 50 counts/mL |
| Dynamic viscosity at 25 °C | ISO 3219 | 2.5 mPa·s ± 1.0 mPa·s |
| Density at 25 °C | ASTM D4052-22 | 1.19 g/cm³ ± 0.01 g/cm³ |
| Zeta potential | ISO 13099-1:2012 | -45 mV to -55 mV |
| Conductivity at 25 °C | ASTM D1125-14 | 2,500 µS/cm ± 500 µS/cm |
On a 200 mm Applied Mirra polisher equipped with an IC1000 polyurethane pad and in-situ diamond conditioning, the EL-grade slurry is delivered through a 0.5 µm point-of-use filter at 150 mL/min to 250 mL/min. Representative settings for blanket PETEOS wafers are platen speed 80 rpm, head speed 80 rpm, downforce 3.5 psi, and back pressure 1.0 psi. Under these conditions the oxide removal rate ranges from 2,500 Å/min to 3,500 Å/min, and within-wafer non-uniformity is maintained below 3% at 1σ with 3 mm edge exclusion. Increasing platen speed from 60 rpm to 90 rpm raises removal rate, but edge-fast profiles may appear above 90 rpm if pad conditioning sweep rates are not adjusted to maintain pad surface texture.
The Preston equation predicts removal rate as a linear function of applied pressure and relative velocity, but oxide chemical mechanical planarization with alkaline colloidal silica often exhibits nonlinear response because the hydrated oxide layer thickness depends on pH, temperature, and slurry contact time. In controlled trials, a downforce increase from 2.0 psi to 4.0 psi raised PETEOS removal rate by approximately 40% to 60%, while a further increase to 6.0 psi produced a smaller incremental gain and increased scratch defect density. Pad temperature measured by infrared thermography rose from 28 °C to 38 °C over a 60-second polish at 4.0 psi; above 40 °C, slurry evaporation at the pad edge changed local solids concentration and contributed to edge non-uniformity. Published data for this specific configuration is limited, but the observed trend is consistent with documented thermal and mechanical effects in oxide CMP.
Within-wafer non-uniformity is minimized when the pad is conditioned with a diamond disk containing 180 µm diamond grit at a conditioning downforce of 6 lbf. Pad glazing, caused by insufficient conditioning or accumulated dried slurry, raises the coefficient of friction and produces center-slow removal profiles. On 300 mm systems, slurry flow rates are typically scaled to 250 mL/min to 350 mL/min, and platen speeds remain in the 60 rpm to 90 rpm range. The transition from open-loop to recirculated delivery can increase large particle counts if the recirculation loop pressure exceeds 20 psi, which is a known production-scale failure mode for high-solids oxide slurries.
The EL-grade colloidal silica system differs from ceria-based interlayer dielectric slurries in removal mechanism and post-polish surface charge. Ceria slurries rely on a higher chemical affinity between Ce4+ sites and oxide surface oxygen; they can produce high removal rates but require stricter post-clean because residual ceria particles are more difficult to remove from oxide and pad surfaces. The comparison below presents representative lot data from the same polishing tool platform for the EL-grade slurry, a standard non-electronic-grade silica slurry, and a ceria-based ILD slurry.
| Parameter | Electronic/EL Grade | Standard Silica Grade | Ceria-Based ILD Slurry |
|---|---|---|---|
| PETEOS removal rate | 2,800 Å/min | 2,700 Å/min | 3,500 Å/min |
| Within-wafer non-uniformity | 2.8% | 3.5% | 3.2% |
| Large particle count ≥ 0.5 µm | < 50 counts/mL | < 200 counts/mL | < 500 counts/mL |
| Sodium by ICP-MS | ≤ 100 ppb | ≤ 500 ppb | ≤ 200 ppb |
| Iron by ICP-MS | ≤ 10 ppb | ≤ 50 ppb | ≤ 20 ppb |
| Copper by ICP-MS | ≤ 5 ppb | ≤ 20 ppb | ≤ 10 ppb |
| Post-clean LPD > 0.2 µm | 35 | 85 | 120 |
After oxide CMP, wafers are transferred within 30 seconds to a double-sided scrubber with polyvinyl alcohol brushes and dilute ammonium hydroxide at pH 10.5. Megasonic cleaning at 1.0 MHz and 60 W reduces sub-0.3 µm particle adhesion; residual slurry particles are more effectively removed when the wafer surface remains wet and the pH is held above 9.5. A final spin-rinse-dry with ultrapure water satisfying ASTM D5127-13 Type E-1 prevents drying marks. Typical post-clean defect density on blanket PETEOS is below 0.08 defects/cm² at a 0.2 µm threshold, but this value depends on pad age, brush condition, and cleanroom particle load.
Colloidal silica slurries are metastable; the EL-grade formulation uses pH buffering and controlled ionic strength to maintain a zeta potential of -45 mV to -55 mV as measured by ISO 13099-1:2012, which suppresses flocculation during recirculation. In a typical 20 L day tank with a 10 L/min diaphragm pump, shear-induced temperature rise of 2 °C to 4 °C is observed after 8 hours; large particle counts ≥ 0.5 µm remain below 50 counts/mL if the loop pressure is maintained below 20 psi. Higher loop pressure across filter housings can generate large particle counts above 200 counts/mL and should be avoided. The slurry should not be diluted with deionized water below 25 wt% solids because the ionic strength reduction shifts the double-layer thickness and can reduce electrostatic repulsion.
Wetted parts in pumps, valves, and tubing should be EPDM, PTFE, or high-density polyethylene; stainless steel and aluminum components are avoided due to metal ion leaching and corrosion at pH 10.8. Storage temperature is 5 °C to 35 °C; freezing causes irreversible particle aggregation. Unopened shelf life is 12 months from the lot manufacturing date when stored at 20 °C to 25 °C. The slurry is not suitable for copper bulk CMP, tungsten CMP, or cobalt barrier polishing; its alkaline pH and silica abrasive are tailored to oxide ILD films. The EL-grade formulation is also not formulated for shallow trench isolation or silicon nitride stopping applications, where selectivity requirements differ. Mixing with acidic copper or barrier slurries lowers pH below 9.0, reduces the magnitude of the negative zeta potential, and can induce particle aggregation in the dispense line. In advanced logic integration, post-polish oxide loss on patterned structures depends on pattern density and linewidth; published data for specific node geometries is limited, so lot qualification on product wafers is required. Each lot is supplied with a certificate of analysis reporting pH, particle size, viscosity, and trace-metal values.
