| HS Code | 147492 |
| Product Type | Hard CMP Polishing Pad (Electronic/EL Grade) |
| Material | Polyurethane-based hard pad |
| Hardness | 75–90 Shore D |
| Thickness | 1.27 mm to 3.18 mm |
| Density | 0.4–0.8 g/cm³ |
| Surface Roughness | Ra 0.5–2.0 µm |
| Porosity | Closed-cell microporous structure |
| Compressibility | Less than 1% at typical applied pressure |
| Elastic Modulus | 200–800 MPa |
| Tensile Strength | 15–40 MPa |
| Elongation At Break | 50–150% |
| Chemical Resistance | Stable in acidic and alkaline CMP slurries |
| Application Capability | Copper, oxide, tungsten, and low-k dielectric polishing |
As an accredited Hard CMP Polishing Pad Electronic/EL Grade factory, we enforce strict quality protocols—every batch undergoes rigorous testing to ensure consistent efficacy and safety standards.
| Packing | Each carton contains 10 Hard CMP Polishing Pads, Electronic/EL Grade, individually sealed in cleanroom protective packaging to prevent contamination. |
| Container Loading (20′ FCL) | 20′ FCL container loading for Hard CMP Polishing Pad (Electronic/EL Grade): fully loaded, export-packed, moisture-protected, stable, secure for safe transit. |
| Shipping | This chemical ships in sealed, moisture-resistant packaging to preserve purity. It is transported as non-hazardous cargo when properly labeled, with temperature-controlled options available. Ensure compliance with electronic-grade handling protocols. Delivery typically takes 3–5 business days domestically, with expedited shipping available for urgent semiconductor manufacturing needs. |
| Storage | Store Hard CMP Polishing Pad Electronic/EL Grade in a clean, dry, well-ventilated area at 15–30°C with relative humidity below 65%. Keep in original sealed packaging, protected from sunlight, UV, dust, oils, and chemicals. Avoid sharp objects, bending, or heavy stacking. Use clean gloves when handling to prevent contamination. |
| Shelf Life | Shelf life is typically 6-12 months from manufacturing date when stored sealed in controlled temperature and humidity conditions. |
Scenario 1 · Copper Barrier CMP in Sub-10 nm Logic
In advanced-node logic device manufacturing, the copper barrier polishing step determines electrical yield through two competing failure modes: copper dishing below 5 nm on 40 nm-pitch trenches and low-k dielectric erosion exceeding 3 nm on p-SiCOH films with k≈2.4–2.7. The EL Grade pad is specified for this step because its pad surface micro-texture and bulk creep compliance must remain stable across a 60-second polish window while a 1–5 wt% colloidal silica slurry at pH 9.0–10.5 removes 200–400 Å·min⁻¹ of Ta/TaN barrier. Compliance anchors for this application segment are SEMI F57 for trace metal extractables, SEMI F104 for incoming pad particle performance, and ASTM D412-16 for tensile property verification of pad-to-pad batch consistency. Formulation addition ratio on the pad side is controlled through isocyanate-to-polyol stoichiometry at 1.8:1 NCO/OH with a targeted hard segment content of 35–40 wt%, producing a Shore D range of 70–80 after a 16-hour post-cure at 110 °C. Downstream integration into the chemical mechanical planarization cell requires in-situ conditioning with a 100-grit diamond disk at 6 lb downforce and 0.4 in·s⁻¹ sweep speed, while platen speed is held at 175 rpm and downforce at 138 kPa. Endpoint is triggered by eddy-current carrier torque when the barrier clears, with a 5-second over-polish window to suppress copper loss. Terminal product types are 300 mm logic wafers for 7 nm/5 nm-class FinFET and gate-all-around nodes; pad qualification data for each fab batch is compared against wafer edge profile removal at 3 mm edge exclusion to maintain die-to-die removal rate variation below ±5%.
Scenario 2 · Shallow Trench Isolation Polishing for DRAM and NAND
A functional challenge in shallow trench isolation planarization for 1z-nm DRAM and 3D NAND emerges when high-density plasma oxide trench fill must be cleared without reducing the underlying 40–60 nm silicon nitride stop layer by more than 10 nm. The hard CMP pad specified for this operation exhibits a compressibility of 0.8–1.5% at 50 psi and elastic recovery above 85%, which limits nitride corner rounding while a 0.1–1 wt% ceria-based slurry at pH 4.5–5.5 delivers oxide-to-nitride selectivity of 30:1–50:1. Industry compliance markers are SEMI F57 for cleanliness, ASTM D2240-15 for Shore D hardness, and IATF 16949:2016 clause 8.4.2 for supplier process control when the wafer is routed to automotive-grade memory. The pad formulation ratio for this process window is adjusted through microballoon concentration at 25–35 wt% in the polyurethane matrix and a nominal groove pattern of 15 mil width, 20 mil depth, and 30 mil pitch, radial-groove geometry. Downstream unit operations pair the pad with a 0.5% ceria slurry feed rate of 200 mL·min⁻¹, platen temperature controlled to 40±2 °C, and carrier backpressure modulation from 3.0 psi initial to 1.5 psi final for edge fast polish control. Oxide removal rate is held at 2500–3500 Å·min⁻¹ with a 15% over-polish target; nitride loss is verified by spectroscopic ellipsometry at 49-point wafer mapping. Terminal devices are planar DRAM storage capacitors and 3D NAND peripheral transistor regions on 300 mm wafers. Published data for this specific configuration is limited for 3D NAND string-stack integration; fab acceptance is typically based on sister-lot pad aging data over 48 hours of continuous polish.
Scenario 3 · Wafer-Level Pad Cleaning and Conditioning After Oxide Polish
When the copper overburden is removed and the pad surface accumulates ceria or silica agglomerates, pad life extension depends on a post-polish cleaning protocol that reduces wafer-level defect density without degrading groove geometry. The EL Grade formulation used in this service condition contains a high crosslink density derived from a 1.8:1 prepolymer-to-curing-agent mass ratio and 15–20% post-cure expansion porosity, which permits a dilute ammonium hydroxide cleaning solution at 2–3% by volume in deionized water to penetrate the top 50–100 µm of pad surface without plasticizing the bulk matrix. Compliance references here are SEMI C59 for nitrogen purge gas, SEMI F57 for liquid extractables after cleaning, and the U.S. EPA Toxic Substances Control Act 40 CFR Part 721 Significant New Use Rule for amine-free cleaning chemistries; ASTM G121-18 is used for pad surface residue quantification. Downstream production equipment is a double-sided brush scrubber with polyvinyl acetal brushes at 0.5 mm gap, followed by megasonic rinse at 1.2 MHz and spin-dry at 1800 rpm for 35 seconds. Measured pad conditioning after cleaning uses a 100-grit diamond disk at 9 lb ex-situ downforce, restoring surface roughness to Ra 6–8 µm as verified by laser confocal microscopy. Failure modes observed on production lines include pad glazing when platen torque drops 8–10% below baseline and groove debris accumulation exceeding 2.5 mg·cm⁻². Terminal product types are cleaned pad surfaces returning to oxide planarization steps for 200 mm and 300 mm CMOS wafers; the cleaned pad must produce post-clean wafer particle counts below 0.08 defects·cm⁻² at 45 nm threshold during monitor wafer runs.
Scenario 4 · Sapphire and SiC Wafer Backside Thinning for Power and RF Devices
In compound semiconductor wafer preparation, the hard CMP pad must planarize single-crystal sapphire C-plane (0001) or silicon carbide 4H-N faces without generating subsurface damage that releases mobile ions during epitaxy. For sapphire, the pad is run with a 0.5–1.0 wt% polycrystalline diamond slurry at pH 10.0–11.0 in a high-pH dispersion system, producing a surface roughness Ra of 0.3–0.5 nm after a 45–60 minute polish cycle at 3 psi. For SiC, the same pad family is operated with a 2–4 wt% colloidal silica slurry at pH 9.5–10.5 and process temperature controlled to 38–45 °C, achieving a Si-face removal rate of 0.5–1.0 µm·hr⁻¹. Applicable industry standards include SEMI M59 for SiC wafer flatness, SEMI M3 for sapphire substrate orientation, ASTM D2240-15 for pad hardness, and RoHS 2011/65/EU for restricted substances in the pad when the wafer is shipped to EU-based device fabs. The pad formulation addition ratio for this use is optimized by adjusting the isocyanate index to 1.0–1.1 and reducing the hard segment content to 20–25 wt% to create a softer land area with Shore D 45–55 that conforms to wafer bow up to 25 µm without edge roll-off. Downstream process equipment is a single-side rotary polisher with ceramic wafer carriers, platen speed 60 rpm, and slurry flow 150 mL·min⁻¹; pad conditioning employs a 150-grit diamond disk at 5 lb to generate micro-asperities for slurry retention. Terminal product types include sapphire LED substrates with 0.2 nm surface roughness and SiC wafers for 1.2 kV–3.3 kV MOSFET and Schottky diode fabrication. The operational boundary is that pad hardness below 45 Shore D causes edge erosion on SiC wafers with bow exceeding 40 µm; therefore, wafer bow sorting before polish is mandatory.
Scenario 5 · Surface Preparation for Advanced Packaging Redistribution Layers
For fan-out wafer-level packaging and 2.5D interposers, the CMP pad planarizes polymer-based redistribution dielectric layers such as polyimide or polybenzoxazole after spin-coating and curing, where wafer topography exceeds 2 µm and the pad must not tear the 5–10 µm polymer film. The EL Grade pad formulation for this segment uses an isocyanate-to-polyol ratio of 2.0:1 with a reduced filler load of 10–15 wt%, yielding a closed-cell structure that avoids exposed abrasive particles and a Shore D range of 65–75; groove dimensions are narrow at 10 mil width and 15 mil depth to reduce slurry pooling near die edges. Compliance anchoring includes IPC-4101 for laminate materials when interposers are subsequently built, SEMI F57 for pad metal contamination, and ASTM D638-14 for pad tensile elongation before and after a 48-hour deionized water soak; extractables after the soak must remain below 10 ppb total metals. Downstream process conditions use a 0.1–0.5 wt% fumed silica slurry at pH 8.0–9.0, platen speed of 90 rpm, downforce of 2.5 psi, and temperature maintained at 25±2 °C to avoid polymer swelling. Pad break-in on production lines requires 30 minutes of dummy wafer polishing at 2.0 psi before the first device wafer is processed; this stabilizes removal rate within 3% and reduces pad break-in particle excursions below 0.06 defects·cm⁻². Terminal products are redistribution layer surfaces on 300 mm wafers for chip-first and chip-last fan-out packages, high-density interconnects with line/space of 2/2 µm, and microbump capture pads. The incompatibility is with amine-based slurry additives above pH 10.5, which hydrolyze the polyurethane ester linkages and cause pad softening beyond 5 Shore D within 4 hours.
Scenario 6 · Integrated Pad Break-In and Defect Suppression for Foundry Reuse
In high-volume foundry environments, the hard CMP pad is subjected to a multi-step break-in sequence before production qualification because fresh pad surfaces exhibit transient high shear that increases microscratch density on unpatterned monitor wafers. The pad formulation ratio for this segment is adjusted through a dual-zone top pad design: the upper 10–15 mil is a microcellular polyurethane with 30 wt% microballoons, and the sub-pad is a non-woven polyester impregnated with a 1.0:1 two-part polyurethane binder at 65±5 g·m⁻² coating weight. Compliance validation uses SEMI F104 for pad particle shedding, SEMI F57 for extractable metals, and ASTM D4147-18 for pad surface profilometry; in the EU, REACH Annex XVII restrictions on isocyanates require finished pad free-NCO content below 0.1% by titration. Break-in on a 300 mm polisher proceeds in three stages: 10 minutes at 1.5 psi with deionized water, 10 minutes at 2.0 psi with a 0.05% surfactant solution, and 10 minutes at 3.0 psi with the production slurry. The post-break-in pad must achieve a removal rate of 1200±50 Å·min⁻¹ on thermal oxide monitor wafers, with within-wafer non-uniformity below 3% and edge exclusion of 5 mm. Monitoring parameters on the production line include pad surface temperature rise of 2–4 °C over 60 minutes, platen motor current variation less than 5%, and groove wear depth below 2 mil after 24 hours. Terminal product types are qualified pad surfaces returned to production for shallow trench isolation, interlayer dielectric, and copper barrier steps across multiple logic and memory flows; pad reuse across dissimilar slurry chemistries is restricted unless a 10-minute intermediate rinse with 0.1% citric acid is executed to prevent slurry cross-contamination.
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Chemical mechanical planarization of dielectric films at nodes below 28 nm requires a rigid top pad that can maintain local planarity over dense and isolated feature arrays without transferring excessive shear to the wafer edge. The Hard CMP Polishing Pad Electronic/EL Grade is supplied in nominal diameters of 510 mm and 760 mm, with top-pad thicknesses of 1.27 mm and 2.03 mm, and is intended for rotary and orbital polishers configured for 200 mm and 300 mm substrates. The pad matrix is a closed-cell microcellular thermoset polyurethane based on an MDI-cured prepolymer. Post-cure extraction in ultrapure water at 80°C for 24 h is controlled to maintain total organic carbon below 1.0 mg/L per pad, and acid-digest ICP-MS quality-control data specify Fe, Cu, Zn, and Cr individually below 0.5 mg/kg. Hardness is reported as Shore D 60 ± 3 under ASTM D2240-15(2021), density as 0.78 ± 0.05 g/cm³ under ASTM D792-20, and compressibility as 1.2 ± 0.3% under a 35 kPa normal load using an internal load-deflection method adapted from ASTM D575-91(2018).
The polyurethane network is formulated to a post-cure glass transition temperature between 40°C and 60°C by dynamic mechanical analysis at 1 Hz under ASTM D5023-15. Storage modulus at 25°C is specified above 350 MPa by three-point bending. Crosslink density calculated from rubber elasticity theory is 1.8–2.4 × 10⁻³ mol/cm³. The MDI/butanediol hard segment content is controlled to 25–30 wt%; higher hard segment increases hardness but reduces slurry wettability. The pad does not contain aluminum oxide, cerium oxide, or silica abrasive fillers; absence of fillers is confirmed by ash content below 0.1 wt% under ISO 3451-1:2019.
The pad is supplied with a pressure-sensitive adhesive backing dimensionally matched to the platen and protected by a polyester release liner. Mounting on a 300 mm rotary platen requires a cleanroom surface temperature of 20–25°C and a lamination pressure of 0.2–0.3 MPa. Entrapped air pockets larger than 10 mm are rejected by visual inspection under dark-field illumination. The backing is not rated for platen temperatures above 55°C continuous; adhesive creep at higher temperatures can cause radial pad displacement of 1–3 mm and center-to-edge thickness drift.
The primary distinction is bulk compressibility under process downforce. Medium-hard pads in the Shore D 45–55 range compress by 2–4% at 35 kPa, allowing the pad surface to bend partially into recessed features; the EL Grade hard pad compresses by 0.9–1.5%, maintaining a higher fraction of applied pressure on protruding surfaces. In blanket oxide planarization this raises planarization efficiency, but the same rigidity increases sensitivity to conditioning end-point drift and pad-wafer friction. Compared with general industrial hard polishing pads, the Electronic/EL Grade formulation avoids fibrous fillers and abrasive grain entrapment and specifies lower extractable trace metals, lower total sulfur, and reduced particle shedding under slurry shear. Industrial pads used for optical glass lapping are not normally tested for wafer-scale metal contamination or for extractable total organic carbon in ultrapure water.
Groove geometry is specified as a continuous spiral with nominal groove depth of 350 µm, width of 300 µm, and pitch of 1.5 mm. Laser confocal profilometry verifies groove depth uniformity across the pad radius to within ±25 µm. The closed-cell pore population has a mean cell diameter between 25 µm and 40 µm, measured by cross-sectional SEM image analysis at 100×. The pore structure is optimized for slurry transport without creating large void volumes that would reduce local stiffness. During polishing, the land area between grooves acts as the primary contact zone; high edge pressure at the retaining ring is modulated by the adhesive stack and by sub-pad selection.
Diamond disk conditioning is mandatory. Typical continuous in situ conditioning uses a diamond grit size of 120–200 µm, conditioner downforce of 44–89 N, and a sweep period of 10–20 s per wafer on a 300 mm platen. Without conditioning, the pore openings and groove edges glaze after 5–10 wafers, producing a measurable drop in removal rate and an increase in wafer-edge non-uniformity. The hard pad’s low bulk compressibility gives a high pad-wafer contact stiffness; oxide removal rate becomes more sensitive to slurry film thickness than to feature density. This is beneficial for shallow trench isolation oxide clearing but can create edge-fast removal if the retaining ring pressure is not balanced with a soft sub-pad.
The continuous spiral groove produces a slurry residence time longer than an XY crosshatch at equal platen speed. Fluid film thickness between pad land and wafer is estimated by an optical fluorescence method at 20–40 µm for slurry flow rates of 150–250 mL/min. The groove pitch of 1.5 mm keeps land width below 1.2 mm, preventing starvation at the pad center on 300 mm substrates. At platen speeds above 120 rpm, slurry sling losses increase; the recommended operating window is therefore 60–120 rpm.
In front-end-of-line shallow trench isolation oxide polishing, the EL Grade pad is used with ceria slurries at 2–3 psi downforce (13.8–20.7 kPa) and platen speeds of 80–120 rpm. In tungsten contact planarization, the same pad is paired with silica slurries at 3–4 psi (20.7–27.6 kPa) to improve plug recess control. For copper barrier clearing, the hard pad provides low dishing on wide copper lines; however, the low compressibility increases the risk of barrier erosion at the wafer edge if the clearing slurry has high abrasive content. The pad is therefore selected for applications where planarity and edge topography control outweigh defectivity sensitivity.
Typical removal rates observed on production tools are process-specific. For high-density plasma oxide with a ceria slurry at 3 psi and 90 rpm, blanket oxide removal rates between 1200 Å/min and 1800 Å/min are reported in production qualification runs. For tungsten contact planarization with a fumed silica slurry at 4 psi, tungsten removal rates of 2500–3500 Å/min are reported. Within-wafer non-uniformity remains below 5% on 300 mm blanket monitor wafers. These rates shift with slurry lot, conditioning disk wear, and platen temperature; they should not be interpreted as guaranteed specifications.
At a downforce of 3 psi on a 300 mm wafer, nominal contact pressure is 20.7 kPa. The high pad stiffness transfers approximately 80–90% of the downforce to protruding features, as calculated from contact mechanics models using a pad flexural modulus of 350 MPa. On the wafer edge exclusion zone, retaining ring pressure must be 1.0–1.2 times the wafer downforce to avoid edge-fast removal. A closed-cell sub-pad with Shore A 40–50 and thickness 1.0 mm is recommended for edge compensation; softer sub-pads reduce edge non-uniformity but lower step-height reduction efficiency.
Particle shedding tests under 30 min slurry shear at 5 psi with a 150 mm blanket wafer show added defect counts below 50 defects at a 0.2 µm threshold when the pad is pre-conditioned. Scratching is controlled by the absence of agglomerated abrasive fillers; the closed-cell pore walls are thinner than 5 µm, reducing hard debris generation after land wear. Particle counts are measured by a laser surface scanner calibrated with polystyrene latex spheres according to the equipment manufacturer’s calibration procedure.
The pad must be operated within a constrained chemistry window. Hydrogen peroxide concentrations above 5 wt% combined with slurry pH below 4 can accelerate hydrolytic degradation of ester-based urethane segments, causing softening, groove rounding, and increased total organic carbon after 200 wafers. Published data for this specific configuration is limited; field observations on 300 mm production tools indicate that a pre-run slurry flush of 5 min with deionized water and an in situ conditioning pass of 3 min after pad change stabilize pad temperature and reduce first-wafer removal-rate drift. The pad is not recommended for polishing with slurries containing 30 wt% hydrogen peroxide or with aromatic solvent-based cleaning fluids above 40°C.
Storage conditions are specified at 15–25°C and 40–60% relative humidity; pads are preconditioned in the cleanroom for 24 h before mounting. The adhesive backing requires a platen temperature below 55°C continuous and below 70°C intermittent. Pad thickness loss above 0.4 mm from groove wear indicates replacement under typical ILD processing. At relative humidity above 60%, water absorption in the polyurethane matrix can increase pad mass by 0.3–0.6%; this is usually reversible but changes acoustic pad-height sensing calibration.
On a five-head rotary 300 mm polisher processing blanket ILD oxide at a platen speed of 90 rpm and downforce of 3.5 psi, pad lifetime before groove depth loss exceeds 0.4 mm is typically 450–600 wafers with continuous conditioning. The dominant failure mode is not bulk fracture but progressive land-area smoothing: the land surface loses microtexture, slurry film thickness increases, and center removal rate drops relative to edge. A second observed failure mode is adhesive-interface delamination when platen cooling is interrupted and the pad stack exceeds 55°C for more than 4 h. Batch-to-batch variance in pad hardness has been controlled by quality-control limits of ±3 Shore D; excursions beyond this range alter removal rate by 5–10% on sustained oxide runs.
Compliance documentation includes material declarations under Directive 2011/65/EU Annex II and REACH SVHC screening at the 0.1 wt% threshold. Halogen content is targeted below 900 ppm total chlorine and below 900 ppm total bromine by combustion ion chromatography; this supports compatibility with wet chemical cabinets that are sensitive to volatile acid outgassing. Outgassing after 24 h at 85°C is specified below 0.1 mass% total mass loss by ASTM E595-15, although published data for this specific pad configuration at higher temperature remains limited.
Typical specification ranges and control methods for incoming lots are summarized in Table 1. Batch release requires hardness, density, thickness, groove depth, and trace-metal data within the listed ranges.
| Property | Typical range | Test method / condition |
|---|---|---|
| Shore D hardness | 58–64 | ASTM D2240-15(2021), 15 s dwell |
| Density | 0.73–0.83 g/cm³ | ASTM D792-20 |
| Compressibility | 0.9–1.5% | Internal load-deflection method adapted from ASTM D575-91(2018), 35 kPa |
| Top-pad thickness | 1.27 ± 0.05 mm; 2.03 ± 0.05 mm | ISO 1923:1981 |
| Groove depth | 320–380 µm | Laser confocal profilometry |
| Groove width | 280–320 µm | Laser confocal profilometry |
| Mean pore size | 25–40 µm | SEM image analysis at 100× |
| Extractable total organic carbon | <1.0 mg/L per pad | Ultrapure water extraction at 80°C for 24 h |
| Trace metals Fe, Cu, Zn, Cr | <0.5 mg/kg each | Acid-digest ICP-MS |
Comparison with adjacent pad classes is provided in Table 2. The data are drawn from published technical bulletins and production qualification runs; industrial glass-polishing pads are included only as a contamination-control contrast.
| Parameter | EL Grade hard pad | Medium-hard CMP pad | General industrial hard pad |
|---|---|---|---|
| Shore D hardness | 58–64 | 45–55 | 55–65 |
| Compressibility at 35 kPa | 0.9–1.5% | 2–4% | 1–3% |
| Extractable total organic carbon | <1.0 mg/L per pad | Not controlled | Not controlled |
| Trace metal control | Fe, Cu, Zn, Cr <0.5 mg/kg each | Not controlled | Not controlled |
| Pore/filler structure | Closed-cell polyurethane, continuous spiral groove | Closed-cell or open-cell polyurethane | Often fibrous-filled or abrasive-impregnated |
| Typical CMP application | STI, ILD, tungsten, Cu barrier | Cu bulk, barrier, some dielectric | Optical glass, metal lapping |
| Primary limitation | Conditioning-sensitive, edge-fast risk | Lower planarization efficiency | Contamination and scratch defects |
Cleanroom handling procedures specify that the pad is removed from vacuum-sealed packaging in an ISO Class 5 environment; the packaging is purged with nitrogen to limit moisture uptake. Operators inspect groove continuity under low-angle illumination before mounting. Pad conditioning qualification comprises a 5 min ex situ dressing with deionized water followed by a 3-wafer dummy oxide run to stabilize removal rate. These procedures reduce first-wafer non-uniformity in production lots.
