| HS Code | 507495 |
| Product Name | Gate Oxide Etchant Electronic/EL Grade |
| Chemical Composition | Buffered oxide etch mixture of ammonium fluoride and hydrofluoric acid |
| Grade | Electronic/EL Grade |
| Appearance | Clear colorless liquid |
| Assay | HF content typically 6-10% and NH4F content 30-40% |
| Selectivity | High etch selectivity for silicon dioxide over silicon |
| Etch Application | Gate oxide wet etching |
| Metal Impurities | Each metal less than 1 ppm (typically ppb level) |
| Particle Count | Controlled to less than 100 particles per milliliter at 0.5 µm |
| Water Content | Balance deionized water, low trace metals |
| Density | Approximately 1.15 g/cm3 at 20°C |
| Boiling Point | Approximately 100°C (decomposes/hydrogen fluoride evolution) |
| Storage Temperature | 18°C to 25°C in sealed HDPE or PFA container |
As an accredited Gate oxide etchant Electronic/EL Grade factory, we enforce strict quality protocols—every batch undergoes rigorous testing to ensure consistent efficacy and safety standards.
| Packing | Gate oxide etchant (Electronic/EL Grade) is packaged in clean, sealed HDPE containers, available in 1-liter and 4-liter quantities. |
| Container Loading (20′ FCL) | 20′ FCL loading: 80 × 200L drums or 20 IBCs on pallets, segregated, cushioned, and secured for safe transport. |
| Shipping | Shipped as a hazardous corrosive liquid (UN1790 Hydrofluoric acid solution), Class 8; packaging group depends on concentration. This Electronic/EL Grade buffered oxide etchant is packaged in clean HDPE/fluoropolymer containers with full DG labeling, documentation, and spill containment to preserve high purity for semiconductor processing. |
| Storage | Store in original, tightly sealed high-density polyethylene or fluoropolymer containers, never glass. Keep in a cool, dry, well-ventilated area between 15–25°C, away from direct sunlight, metals, alkalis, and incompatibles. Ensure secondary containment and segregation. Inspect for leaks regularly. Follow all electronic-grade handling protocols to prevent contamination and hazardous exposure. |
| Shelf Life | Shelf life is typically 12 months when stored sealed in original container at room temperature, away from moisture and light. |
In advanced CMOS front-end-of-line wafer fabrication, the sacrificial pad oxide that protects the silicon surface after shallow trench isolation is removed with an electronic/EL-grade buffered oxide etchant before high-k metal gate stack deposition. The oxide layer, commonly 10–25 nm of thermally grown SiO₂ on Si(001), must be stripped without adding mobile-ion contamination or leaving silicic acid residues that shift threshold voltage in FinFET and gate-all-around transistors. The product is formulated at point-of-use as a 10:1 volume blend of 40.0% NH₄F per SEMI C29 and 49.0% HF per SEMI C8, with 0.02% nonionic surfactant to lower surface tension and improve wetting inside isolated active areas. The bath is used undiluted in a fully automated 25-cassette quartz immersion wet bench at 22 ±0.5 °C, with 900 kHz megasonic agitation and an upward-flow DI water overflow rinse of 18.2 MΩ·cm resistivity per ASTM D5127-13. Replenishment is metered by a point-of-use blender that injects 0.5 ml HF per wafer-pass when the fluoride ion electrode reading falls outside the qualified setpoint; ratio drift is maintained within ±0.2. The strip is endpointed by 49-point ellipsometry, and wafers proceed to Marangoni IPA drying. Compliance for this operation includes SEMI C29 particle and trace metal tables, SEMI S2/S8 equipment safety, ISO 14644-1:2015 Class 3 cleanroom, and SEMI F57 chemical distribution wetted components. Terminal products are logic SoCs, application processors, and memory controllers for data-center, mobile, and high-performance computing packages.
MEMS pressure sensors, accelerometers, and gyroscopes require suspended polysilicon structures that are defined by selective removal of a TEOS- or PSG-based sacrificial layer in a wet release step. The oxide etchant is typically used as a 7:1 volume blend of 40.0% NH₄F and 49.0% HF, with 5–15 vol% IPA added to reduce surface tension and lower capillary force during rinse and drying; this reduces stiction-induced yield loss on released comb-drive and spring structures. The bath is maintained at 22 ±1 °C in a quartz tank with 800 kHz megasonic energy and 0.1 µm PTFE filtration. The release process follows deep reactive-ion etching of the silicon mechanical layer, with the BOE bath dissolving the sacrificial SiO₂ and leaving the silicon device layer intact; a post-etch DI water rinse and CO₂ supercritical drying step is applied to preserve critical 1–5 µm air-gap spacing. Chemical quality is governed by SEMI C29 trace metal and particle controls, with ISO 14644-1:2015 Class 5 cleanroom operation; automotive-grade MEMS flows additionally require ISO 26262 functional safety documentation and AEC-Q100 qualification for the final packaged sensor. Terminal product types include inertial measurement units, automotive airbag accelerometers, electronic stability gyroscopes, and implantable pressure sensors where ISO 13485:2016 process documentation applies.
Sacrificial oxide control in high-aspect-ratio 3D NAND channel-hole processing depends on etch rate uniformity across 300 mm multi-layer stacks, selectivity to silicon nitride, and suppression of residue inside vertical channels. In this flow, the etchant is point-of-use blended as a 20:1 volume ratio of 40.0% NH₄F to 49.0% HF and delivered at 24 ±0.3 °C through PTFE/PFA recirculating distribution with 0.1 µm cartridge filtration and pressure-rated static mixing. The bath is charged undiluted; after 50 wafer-passes, 0.1 ml HF per liter is injected into the recirculation line when the fluoride ion selective electrode reading moves outside the qualified millivolt window, because H₂SiF₆ accumulation suppresses further oxide dissolution and increases defect density. Etching is performed in cassette-less single-batch quartz tanks equipped with splash shields, downflow exhaust, and in-line particle counters set to trigger batch hold at 50 counts/ml at 0.1 µm. Uniformity is verified by 49-point ellipsometric mapping with a 3σ target below 2 nm on sacrificial thermal oxide coupons. Compliance references include SEMI C29 for BOE metal-ion tables, SEMI F57 for distribution components, ASTM D5127-13 for ultrafiltered rinse water, and ISO 14644-1:2015 Class 4 cleanroom classification. Terminal products are high layer-count TLC and QLC 3D NAND memory dies assembled into enterprise SSDs and embedded UFS devices for mobile storage.
| Application | BOE volume ratio | Bath temperature | Target oxide type | Equipment class |
|---|---|---|---|---|
| Advanced logic pad oxide strip | 10:1 NH₄F 40% : HF 49% | 22 ±0.5 °C | Thermal SiO₂ 10–25 nm | 25-cassette quartz immersion wet bench |
| MEMS sacrificial release | 7:1 + 5–15 vol% IPA | 22 ±1 °C | TEOS/PSG 1–3 µm | Quartz tank with CO₂ critical dryer |
| 3D NAND sacrificial strip | 20:1 | 24 ±0.3 °C | Thermal SiO₂ coupons in multilayer stack | Cassette-less quartz batch tank |
| Power discrete gate patterning | 20:1 | 23 ±0.5 °C | Thermal SiO₂ 80–120 nm | Single-wafer spray processor |
| Flat panel TFT opening | 5:1 + 2 vol% IPA | 25 ±1 °C | PECVD SiO₂ 200–500 nm | Horizontal shower wet processor |
| Wafer-level packaging passivation | 10:1 | 23 ±0.5 °C | SiON/SiO₂ 100–300 nm | Spin puddle spray processor |
Table values are equipment-supplier qualification ranges; production lot acceptance requires site-specific oxide coupon confirmation. Published data for a given chamber configuration may be limited because wet-etch rate depends on bath age, dissolved silicofluoride concentration, wafer surface preparation, and local exhaust variation.
Trench MOSFET and IGBT gate patterning imposes a narrow undercut budget because the thermal silicon dioxide layer doubles as both dielectric and hard mask during source-body contact opening. After dry O₂ + HCl oxidation at 1,050 °C, a 20:1 BOE blend is used undiluted in a single-wafer spray processor at 23 ±0.5 °C, with 0.01% high-purity nonionic surfactant and endpoint control through timed dispense at 1.0–1.5 L/min. Formulation addition ratio: the process bath is initially charged with a 20:1 volume blend of 40.0% NH₄F to 49.0% HF; after 25 wafers, 0.3 ml HF per batch is metered when the fluoride ion selective electrode reading drifts outside the qualified setpoint. Spray processing is run at 800–1,200 rpm wafer rotation, followed by a 2.0 L/min DI water rinse and nitrogen/IPA drying; this avoids immersion-bath particle accumulation that can create leakage failure in trench bottoms. Post-etch SC-1 cleaning at 40 °C removes organic residues and inhibits metal-induced weak spots. The addition of amine-based pH adjusting agents is prohibited because it shifts fluoride speciation and accelerates photoresist lifting. Compliance standards include AEC-Q101 for automotive discrete qualification, IATF 16949 for quality system conformance, SEMI C29 for chemical quality, SEMI S2/S8 for wet-bench safety, and ISO 14644-1:2015 Class 5 cleanroom operation. Terminal products include 1.2 kV and 1.7 kV trench IGBTs, power MOSFETs, and integrated power modules used in traction inverters, onboard chargers, and industrial motor drives.
When flat-panel display manufacturers replace immersion etching of PECVD SiO₂ passivation layers with single-chamber horizontal spraying, the etchant is formulated at 5:1 to maintain throughput at lower chemical consumption per substrate. On Gen 8.5 and Gen 10.5 rigid glass substrates, the final bath contains a 5:1 volume blend of 40.0% NH₄F and 49.0% HF plus 2 vol% IPA, and is sprayed through fan nozzles at 0.2–0.4 MPa and 25 ±1 °C in a Teflon-coated 150 L tank. The addition ratio during production is replenished at 0.8 ml HF per m² of glass processed to compensate for fluorine consumption by both SiO₂ and exposed aluminosilicate glass; without this replenishment, oxide-to-glass etch selectivity falls and the substrate develops haze. Conveyor speed is set between 2.5 m/min and 3.5 m/min, followed by a DI water cascade rinse with 18.2 MΩ·cm resistivity and an air-knife drying stage. Compliance standards for display wet processing include SEMI C29 for etchant purity, ISO 14644-1:2015 Class 5 for the etch chamber environment, SEMI S2/S8 for tool safety, and REACH Regulation EC 1907/2006 for chemical registration in the supply chain. Terminal products are LTPS and IGZO TFT backplanes for AMOLED mobile displays and high-resolution LCD panels; the main operational boundary is the glass substrate exposure window, which requires endpoint control rather than extended over-etch.
Wafer-level chip-scale packaging passivation opening uses a dilute BOE step to clear SiO₂ or SiON over copper and aluminum pad regions before electroplating of bump metallurgy. The etchant is prepared as a 10:1 volume blend of 40.0% NH₄F and 49.0% HF, with 0.05% fluorosurfactant, and applied as a spin puddle at 23 ±0.5 °C in a 300 mm spin processor. The spin speed is held at 500 rpm during puddle formation, then increased to 1,200 rpm for rinse-off; this limits exposure of unprotected copper seed layers to HF, which otherwise dissolves copper and increases bath metal contamination. Formulation addition ratio: the bath is charged undiluted, and 50 ml of 49.0% HF is added per 25 processed wafers based on fluoride ion selective electrode and titration results; the bath is drained when copper concentration exceeds 50 ppb to avoid galvanic defect formation. Compliance requirements include SEMI C29 for cation and particle limits, SEMI F57 for wetted component selection, ISO 9001:2015 for process auditing, and SEMI S2/S8 for fab equipment safety; specific customer flows may add JEDEC moisture sensitivity testing at the finished package level. Terminal products are fan-out wafer-level packages, reconstructed wafers, and bumped dies for application processors and RF modules.
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Gate oxide etchant Electronic/EL Grade is supplied as a buffered-oxide-etch formulation in which 40 wt% ammonium fluoride solution and 49 wt% hydrofluoric acid are blended at fixed volumetric ratios. The Electronic/EL designation refers to a release-controlled purity tier rather than a single chemical composition. Standard product identification is based on the volumetric ratio suffix, such as EL BOE 6:1, EL BOE 7:1, or EL BOE 10:1. A 7:1 blend approximates 34.5 wt% ± 0.5 wt% NH4F and 6.4 wt% ± 0.2 wt% HF after density correction. The product is intended for removal of sacrificial thermal oxide, densified tetraethyl orthosilicate, and native oxide in front-end-of-line wet-clean operations where gate oxide integrity depends on surface metal contamination below the 10 ppb per-element limit used for release testing.
Release specifications are tied to bath-life stability and point-of-use filtration performance, not solely to initial assay. The solution is filtered through 0.05 µm fluoropolymer membranes and filled into PFA containers under high-purity nitrogen. Certification includes trace metal analysis by ICP-MS, anion analysis by ion chromatography, and liquid-borne particle counts by optical particle counter calibrated to ISO 21501-4.
The controlling difference is the mobile-ion burden remaining on the wafer after final rinse. Sodium, potassium, calcium, iron, and transition metals are limited individually to ≤10 ppb in the EL-grade release specification because these species can migrate into the gate oxide during subsequent thermal processing and shift flatband voltage or reduce charge-to-breakdown. Reagent-grade HF and commodity BOE are frequently supplied with individual metal concentrations above 100 ppb and particle burdens above 1000 counts/mL at 0.2 µm, which makes them unsuitable for gate oxide strip without additional in-situ purification.
| Parameter | Limit | Test method |
|---|---|---|
| Ammonium fluoride as NH4F | 34.5 wt% ± 0.5 wt% | Acid-base titration |
| Hydrofluoric acid as HF | 6.4 wt% ± 0.2 wt% | Acid-base titration |
| Individual trace metals | ≤10 ppb | ICP-MS per SEMI C29 |
| Total trace metal burden | ≤50 ppb | ICP-MS per SEMI C29 |
| Particles at ≥0.2 µm | ≤50 counts/mL | Light-scattering particle counter per ISO 21501-4 |
| Chloride | ≤500 ppb | Ion chromatography |
| Sulfate | ≤500 ppb | Ion chromatography |
The ammonium fluoride buffer maintains free fluoride activity within a narrower window than non-buffered dilute HF. In dilute HF, pH drift from airborne ammonia, carbon dioxide absorption, or water evaporation shifts the etch rate and can introduce assay error after 24 h to 48 h of bath aging. In EL-grade BOE, the NH4F/HF equilibrium reduces this drift, although evaporation control remains critical because water loss above 1% in an open immersion bath can still raise the observed thermal oxide removal rate by enough to violate post-etch thickness targets.
In production wet-bench operation, the etchant is recirculated through a fluoropolymer loop with point-of-use filtration at 0.05 µm and in-line temperature control at 25 °C ± 0.5 °C. A temperature offset of 5 °C in an immersion bath changes thermal oxide removal by approximately 10% to 15%. Jacket-cooled quartz or PFA baths are therefore used rather than ambient polypropylene tanks. On a single-wafer spray processor, the product is dispensed through a chemical delivery module with mass-flow calibration to ±2% and mixed with ultrapure water at the point of use. Observed production failure modes include etch rate drift after 72 h of bath aging when water evaporation exceeds 1%, and particle shedding from degraded fluoropolymer seals. Batch-to-batch etch rate variance is held below ±5% by ratio-controlled blending and density correction before release.
The blend ratio controls the steady-state concentration of active etching species and therefore the removal rate of thermally grown silicon dioxide. The values below are representative production bath data for gate oxide etchant held at 25 °C ± 0.5 °C and verified by spectroscopic ellipsometry after a deionized water rinse. Actual etch rates vary with film density, thermal history, and bath age, so lot-specific verification is required for critical gate oxide removal steps.
| Formulation | Thermal SiO2 etch rate at 25 °C | LPCVD Si3N4 etch rate | Oxide-to-nitride selectivity |
|---|---|---|---|
| EL BOE 6:1 | 110–130 nm/min | <3 nm/min | >40:1 |
| EL BOE 7:1 | 90–110 nm/min | <2 nm/min | >50:1 |
| EL BOE 10:1 | 70–90 nm/min | <1 nm/min | >70:1 |
For densified tetraethyl orthosilicate films, the same baths typically remove material at 110–130 nm/min for the 7:1 blend because the deposited oxide is less dense than thermal oxide and etches more readily. The nitride etch rate remains below 2 nm/min, which is acceptable when the gate oxide etch must stop on a pad nitride or when nitride spacers are present. Silicon etch rates in these formulations are below 1 nm/min, giving an oxide-to-silicon selectivity greater than 100:1 under typical process conditions.
EL-grade BOE differs from commodity 49% HF in three process-relevant parameters: trace metal delivery, particle shedding, and etch rate controllability. Commodity 49% HF etches thermal oxide at removal rates exceeding 1000 nm/min, which is too aggressive for pre-gate oxide sacrificial layer removal where final remaining oxide thickness is often below 10 nm. EL-grade BOE 7:1 reduces the removal rate to 90–110 nm/min, providing an etch time window of several minutes for a 100 nm sacrificial oxide. The reduction in etch rate directly improves thickness control on immersion wet benches with manual batch transfer.
Compared with non-buffered dilute HF, EL-grade BOE provides a more stable etch rate over bath age because the ammonium fluoride buffer maintains fluoride activity despite partial consumption of HF. Dilute HF 100:1 is preferred for removal of ≤2 nm native oxide or for surface conditioning immediately before film deposition, but it is not a suitable substitute for sacrificial thermal oxide strip because its thermal oxide removal rate is substantially lower and more sensitive to pH drift. EL-grade BOE therefore occupies the intermediate removal-rate range between dilute HF and concentrated HF, while providing the low-metal specification required for gate dielectric processing.
EL-grade BOE is not interchangeable with mixed acid isotropic silicon etchants such as HF/HNO3/CH3COOH blends. Mixed acid formulations attack silicon and can generate significant surface roughness, whereas the BOE chemistry is intended to remove silicon dioxide selectively against silicon. The HNO3 component in mixed acid etches also introduces nitrogen-bearing residues and is incompatible with the low-trace-metal requirements of gate oxide formation. For this reason, EL-grade BOE is specified only for oxide removal steps, not for silicon fin formation, cavity etching, or sacrificial silicon removal.
For sacrificial oxide removal on 200 mm and 300 mm wafers, the product is used in temperature-controlled immersion baths with overflow rinse tanks and Marangoni drying. In shallow trench isolation integration, EL-grade BOE removes the sacrificial pad oxide before liner oxidation without measurable attack on the silicon nitride hard mask, provided the bath temperature is held within ±0.5 °C and the exposure time does not exceed the calculated endpoint by more than 30%. In pre-diffusion cleans, the etchant removes native oxide from source/drain regions immediately before ion implantation; incomplete removal leaves interfacial oxide that modifies projected range, while over-etch roughens the silicon surface and increases sheet resistance variation.
Operational boundaries include incompatibility with aluminum, titanium nitride, and tantalum nitride layers. EL-grade BOE attacks these materials and is therefore restricted to front-end-of-line processing before metal deposition. Surfactant additives are not used in EL-grade BOE because they introduce organic residues and alter rinse efficiency. If surface wetting on hydrophobic silicon is required, an ozonated ultrapure water pre-rinse is used before the BOE step. Published etch rate data for EL-grade BOE on hafnium oxide and other high-k gate dielectrics is limited, so process qualification is required before use on replacement metal gate stacks. Storage is maintained at 20–25 °C in sealed PFA containers to prevent water vapor uptake or fluoride loss.
