On a 200 mm silicon wafer line running 0.5 µm g-line lithography for aluminium-copper interconnect layers, TOK TSMR-8900 is dispensed through 0.2 µm point-of-use filtration at a static volume of 3.0 mL to 4.0 mL per wafer, then spin-coated to a nominal film thickness of 0.95 µm to 1.10 µm at 3000 rpm depending on exhaust backpressure and wafer bow. The softbake is performed on a hotplate at 90 °C for 60 s, a thermal budget that drives off residual PGMEA without causing thermal crosslinking of the novolak resin. Exposure is carried out at 436 nm with a dose of 80–120 mJ/cm² on a g-line stepper or aligned scanner; post-exposure bake at 110 °C for 60 s suppresses standing-wave ripples on reflective aluminium-grain surfaces. Development in 2.38% tetramethylammonium hydroxide with a single-puddle process for 60 s produces 0.5 µm line/space resolution in 1.0 µm film. The patterned resist is then used as an etch mask in a BCl3/Cl2 plasma at 13.56 MHz; photoresist-to-AlCu selectivity is 1.5:1 to 2.0:1, requiring a hardbake at 120 °C for 60 s to reduce top loss. The terminal wafer surface contains analog/mixed-signal CMOS devices, power management controllers, or discrete high-side switches. Mask adhesion is monitored with a scribe-tape test consistent with ASTM D3359-17, linewidth uniformity is measured by top-down CD-SEM with ±5% three-sigma control, and resist thickness is checked by spectroscopic ellipsometry against a 1.0 µm reference. Chemical safety and equipment interaction are documented under SEMI S2-0718; PGMEA waste is handled under 40 CFR 261 hazardous waste classifications.

What Changes When TSMR-8900 Is Used as an Electroplating Mold for Copper RDL in Wafer-Level Packaging?

The electroplating mold configuration changes the substrate from silicon oxide to sputtered copper seed, and the photoresist film is no longer a sacrificial etch mask but a negative cavity former. After wafer-level dielectric coating and Ti/Cu seed deposition, the wafer is dehydrated at 150 °C for 60 s and treated with HMDS vapor at 120 °C for 5 min; however, excessive amine-containing adhesion promoters on copper seed must be controlled because they can retard TMAH dissolution at the base of the resist feature. TSMR-8900 is coated at 2500 rpm to a thickness of 1.2 µm, softbaked at 85 °C for 60 s, exposed at 436 nm with 100–140 mJ/cm², and developed in 2.38% TMAH using a spray-puddle sequence for 90 s to clear high-aspect-ratio redistribution layer vias. A post-develop descum at 50 W in argon for 30 s removes resist residue without oxidizing the Cu seed; oxygen descum is avoided because CuOx forms at the seed surface and causes plating voids. Copper electroplating is then performed in an acid copper bath containing CuSO4·5H2O at 160 g/L, H2SO4 at 60 g/L, and chloride ion at 50 ppm, with a brightener concentration maintained by cyclic voltammetry stripping; line/space RDL features are plated to 5–8 µm thickness at 2.0 A/dm² current density. Resist stripping in NMP-based solvent at 80 °C is followed by seed etch and polyimide cure. The finished wafer-level chip-scale package contains fan-in copper redistribution lines and under-bump metallization pads; thermal cycling of the packaged device is qualified according to JEDEC JESD22-A104, and the resist supplier’s lot-to-lot viscosity variation is held within ±0.2 cP to keep RDL CD variation below ±0.15 µm on a total thickness variation of ±0.03 µm across a 200 mm wafer.

When a Chlorobenzene Soak Is Required for GaAs pHEMT Gate Lift-Off

When TSMR-8900 is used as a lift-off mask for T-gate or rectangular-gate metallization on gallium arsenide, the native positive-tone sidewall must be converted into a controlled undercut. After HMDS priming at 110 °C for 5 min, the resist is coated at 3000 rpm to 1.0 µm and softbaked at 90 °C for 60 s; exposure at 436 nm with 90–120 mJ/cm² is followed by a room-temperature chlorobenzene soak for 10–20 min to selectively harden the resist surface and retard vertical dissolution. The wafer is developed in 2.38% TMAH for 30 s with no post-exposure bake, because a PEB at 110 °C would promote the normal positive-tone diffusion path and eliminate the undercut. Cross-sectional SEM is used to confirm an undercut of 0.1–0.3 µm per edge; variations beyond this window produce either metal stringer formation or collapse of narrow gate structures. Electron-beam evaporation of Ti/Pt/Au is performed with the wafer mounted on a planetary fixture; deposited metal thickness is 0.5 µm for the gate foot and 1.0–1.5 µm for the cap, with deposition pressure below 5 × 10⁻⁷ Torr to minimize sidewall coating. Lift-off in NMP at 80 °C with 40 kHz ultrasonic agitation removes the mask, leaving gate metal with a defined foot and wide cap. The terminal products are depletion-mode GaAs pHEMTs for low-noise amplifiers operating from 6 GHz to 40 GHz. Chlorobenzene handling demands a dedicated coater cup, exhaust face velocity above 0.3 m/s, and compliance with OSHA 1910.1000 Table Z-1 for chlorobenzene exposure below 10 ppm 8-hour TWA; REACH Regulation (EC) No 1907/2006 annex-based SDS disclosure is required, and chlorobenzene-laden waste must be segregated from PGMEA developer waste under 40 CFR 261 to avoid hazardous solvent mixtures.

SAW Filter Interdigital Transducer Patterning on 36° Y-X Lithium Tantalate

On 36° Y-X lithium tantalate or 128° Y-X lithium niobate piezoelectric wafers, TSMR-8900 is applied directly over sputtered aluminium of 0.2–0.4 µm thickness to define interdigital transducer fingers. Because lithium tantalate is pyroelectric, the hotplate softbake must use a proximity bake at 85 °C for 60 s or a ramp rate below 5 °C/min to avoid pyroelectric discharge that punctures the aluminium film. Exposure at 436 nm on a g-line stepper with 80–130 mJ/cm² creates risk of standing-wave interference from the high-refractive-index substrate; a dyed or bottom antireflective layer is often not used because resist thickness is fixed at 0.9 µm by the IDT etch selectivity. Development in 2.38% TMAH for 45 s clears 0.4 µm IDT lines and spaces, and the resist is hardbaked at 110 °C for 60 s before wet etching the aluminium in a phosphoric acid/nitric acid/acetic acid mixture at 35–40 °C; the etch rate is 0.8–1.2 µm/min, and resist-to-aluminium etch selectivity is approximately 10:1. After etching, the resist is stripped in NMP at 70 °C; residual scum is not tolerated because it shifts the acoustic aperture and alters resonator frequency. The terminal products are RF SAW filters and resonators operating from 800 MHz to 2.5 GHz, used in mobile front-end modules. Final electrode adhesion is verified by ASTM D3359-17 cross-cut tape test; device reliability is assessed under IEC 60068-2-58 high-temperature storage and JEDEC JESD22-A101 steady-state temperature-humidity bias. RoHS compliance for the finished SAW component is evaluated under 2011/65/EU for lead-free soldered terminations.

For a MEMS silicon oxide sacrificial layer definition on 150 mm silicon-on-insulator wafers, TSMR-8900 is applied as a wet-etch mask in buffered hydrofluoric acid-based etchants. The wafer receives a dehydration bake at 200 °C for 120 s on a contact hotplate, followed by HMDS vapor priming at 120 °C for 5 min; this sequence raises adhesion from 2B to 5B when assessed by ASTM D3359-17 cross-cut, a necessary condition for immersion in HF-based etch baths. TSMR-8900 is coated at 4000 rpm to 0.9 µm, softbaked at 90 °C for 60 s, exposed at 436 nm with 70–110 mJ/cm², and developed in 2.38% TMAH for 45 s. After a hardbake at 120 °C for 90 s, the patterned resist protects selected regions during room-temperature etching in buffered HF at 6:1 ratio; etch time for 1.0 µm of thermal oxide is 8–12 min, during which resist adhesion loss or pinhole formation results in oxide pitting. The process is not compatible with exposed aluminium bond pads, which are rapidly attacked by the HF bath; when aluminium pads are present, a double-layer masking sequence or an alternative dry-etch path is required. After etch completion, the resist is stripped in oxygen plasma at 150 °C for 30 min or with 80 °C NMP. The terminal devices are MEMS gyroscopes, accelerometers, or pressure-sensor membranes in which the sacrificial oxide layer defines the released microstructure; critical dimension loss during wet etch is held below 0.1 µm per edge by overbake densification and adhesion monitoring. Process safety is governed by SEMI S2-0718 for the HF wet bench, and the waste stream is categorized under 40 CFR 261 as corrosive hazardous waste, with pH neutralization before discharge.

Photodiode Front-Side Contact Patterning on Plasma-Deposited Silicon Nitride

When a front-side illuminated photodiode wafer requires contact window opening in a 0.3 µm PECVD silicon nitride passivation layer, TSMR-8900 is used as a dry-etch mask for CHF3/O2 plasma. The nitride film is first cleaned in 100:1 diluted hydrofluoric acid for 30 s to remove native oxide, dehydration-baked at 180 °C for 60 s, and HMDS-primed at 120 °C for 5 min. The resist is spin-coated at 3000 rpm to 1.0 µm, softbaked at 90 °C for 60 s, exposed at 436 nm with 90–130 mJ/cm², and developed in 2.38% TMAH for 60 s. A post-develop oxygen descum at 40 W for 20 s removes scum before nitride etch; the presence of caustic developer residues on the nitride surface can cause uneven etch initiation and is minimized by a 30 s deionized water rinse at 20 °C. Reactive-ion etching is performed with CHF3/O2 at 50 mTorr and 150 W RF power, giving nitride etch rates of 30–40 nm/min and photoresist etch rates of 25–35 nm/min, so the 1.0 µm resist mask can safely clear 0.3 µm of nitride without excessive faceting. After etch, the resist is stripped in oxygen plasma at 120 °C for 20 min; remaining nitride defines the photodiode active area and contact windows. The terminal components are front-side illuminated silicon photodiodes for optical sensors, automotive light detection, or medical pulse oximetry; final photodiode performance is tested according to IEC 60747-5 semiconductor photodetector specifications, and the packaged device is assessed for lead-free soldering under JEDEC J-STD-020E moisture sensitivity classification. Solvent and stripper handling on the line is covered by SEMI S2-0718, and PGMEA-containing waste is segregated under 40 CFR 261; the combination of TMAH developer and CHF3/O2 plasma requires separate exhaust streams to prevent fluoride-amine salt formation in ductwork.