What Restricts AlCu 0.5 wt% in TFT-LCD Gate Electrode Applications at 4 Mask Layers?

In TFT-LCD array processing, the AlCu 0.5 wt% film is sputter-deposited on glass substrates up to 2200 mm × 2500 mm, then wet-etched with a phosphoric/acetic/nitric acid mixture after gate photolithography; the Cu addition in the 0.45–0.55 wt% range is retained to attenuate hillock formation during silicon nitride deposition at 280–350 °C. The industry compliance window for large-area glass coating is bounded by IEC 61747-1 for display device design approval and RoHS 2011/65/EU for the final module. A single AlCu 0.5 wt% target type can serve gate, source, and drain metal for a 4-mask a-Si TFT process if the wet etch differential between Al and Mo or MoNb barrier layers is kept below 0.15 µm per tip. The downstream production flow includes cleaning of 0.7 mm or 0.5 mm soda-lime glass, PVD preheat at 150 °C, AlCu sputtering to 200–300 nm, cap-metal deposition of Mo or MoNb to prevent hillocks and enable via contact, photoresist coating, wet etch, strip, and thermal annealing at 300 °C for 60–120 min. The terminal product types include TN, IPS, and VA panels for smartphones, monitors, and automotive instrument displays; the AlCu 0.5 wt% variant is preferred over pure Al for the source-drain level because pure Al can generate whisker-like hillocks above 250 °C and can fail the post-anneal gate-to-source leakage test at panel-level probe. The process conflict arises at the gate wet etch step: the Cu addition reduces hillock density but leaves a Cu-enriched residue in the taper zone when the etch bath temperature drops below 35 °C, and that residue increases contact resistance if not removed by a 30 s post-etch dilute nitric acid rinse. Production-scale Gen 8.5 coating lines frequently monitor target arc count during the first 20 kW·h of a new AlCu target because air exposure above 50% RH during target change can oxidize the Cu-rich phase and produce micro-arcing that damages the MoNb cap layer uniformity.

When AlSi 1 wt% Top Metal Replaces AlCu 0.5 wt% in Power Device Wire-Bond Pads and Solderable Front Metal

When the front-side contact of a power MOSFET, IGBT, or rectifier is formed from AlSi 1.0 wt% instead of AlCu 0.5 wt%, the driving constraint is ultrasonic wire-bond force transmission through a 3–4 µm metal layer into an underlying silicon device region, not electromigration alone. The Si addition of 0.9–1.1 wt% improves the thermal stability of the pad during solder reflow and reduces the hardness drop at 250 °C that otherwise promotes probe mark defects and non-stick wire bonds on pure Al. Industry compliance is commonly verified under AEC-Q101 for discrete power qualification, JEDEC JESD22-A104F for temperature cycling, and MIL-STD-883K Method 2010.9 for wire-bond pull testing. The downstream manufacturing sequence includes front-side evaporation from an AlSi 1.0 wt% slug in a 1×10⁻⁶ mbar resistance-heated evaporator, wafer liftoff by immersion in NMP or DMSO at 80 °C, alloying at 400–450 °C for 20–40 min, passivation deposition over the pad windows, wafer dicing, die attach to Cu leadframe with Pb-free solder at 245–260 °C, and ultrasonic wedge bonding with 250–500 µm Al wire. The terminal products are power modules, motor-drive IGBTs, automotive battery-management MOSFETs, and industrial rectifiers in TO-220, TO-247, DPAK, and power module outlines. The process limitation is that AlSi 1.0 wt% pads are not compatible with direct Cu wire bonding at aggressive parameter settings because the Si precipitates can locally raise the bonding force threshold and cause pad cratering; AlCu or AlSiCu is usually selected when mixed Al/Cu wire capability is required. Production lines also specify an incoming pre-treatment on evaporation slugs: the slug surface is etched in a dilute fluoride-containing solution to remove the native oxide layer, then vacuum-dried at 60 °C for 12 h before loading, because residual moisture on the slug surface can raise the evaporator base pressure and generate spatter that lowers pad thickness uniformity below ±5% across a 200 mm wafer.

For bulk acoustic wave resonators and RF-MEMS switches, AlSiCu 1.0/0.5 wt% is deposited as a structural or electrode layer after sacrificial oxide planarization; the Si addition keeps the metal flat through the 350–400 °C piezoelectric crystallization anneal, while the Cu addition increases electromigration resistance in RF signal lines with current density above 1×10⁶ A/cm². The deposition process often uses DC magnetron sputtering from AlSiCu 1.0/0.5 wt% targets at wafer temperature 200–300 °C, followed by masking and inductively coupled plasma etching with BCl₃/Cl₂ chemistry where Cu causes a 15–25% drop in etch rate relative to pure Al and necessitates endpoint monitoring by optical emission spectroscopy. Industry compliance for the MEMS device is frequently tied to JEDEC JESD22-A102 for unencapsulated humidity stress and ISO 14644-1:2015 Class 5 for the wafer-level packaging area. The formulation addition ratio of Si 0.9–1.1 wt% and Cu 0.45–0.55 wt% in a 99.999 wt% Al base is chosen because lower Si loses hillock suppression, while higher Si forms protruding Al-Si eutectic precipitates that can lift the photoresist during wet processing and create shorting paths between electrode fingers. Terminal product categories include MEMS accelerometers, gyroscopes, BAW duplexers, and pressure sensors where the metallization must survive the HF vapor release step of sacrificial layer removal without delamination. The operational boundary is that prolonged exposure to buffered oxide etch with pH <4 after metal etch can preferentially attack the Si-rich phase and increase surface roughness above 2 nm RMS; therefore post-etch rinsing time is clamped below 5 min in deionized water. Batch-to-batch variance in the AlSiCu target is tightly controlled on the Si-rich second phase because a difference of 0.2 wt% Si between target lots can shift the BCl₃ etch selectivity by more than 10% and alter the critical dimension of a 2 µm RF switch bridge by 0.1 µm after over-etch.

Advanced Package Redistribution Layers: Galvanic Coupling and Corrosion Resistance of AlCu 0.5 wt%

In wafer-level chip-scale packaging, AlCu 0.5 wt% is used as a redistribution layer metal when the package is not subjected to Cu-damascene-compatible low-k integration; it is sputtered to 1.0–2.5 µm and patterned by a semi-additive or subtractive process before solder bumping or Cu pillar attachment. The compliance checklist includes IPC-A-610H acceptance for the bumped wafer, JEDEC JESD22-A102 for unbiased autoclave testing at 121 °C/100% RH, and REACH Regulation (EC) No 1907/2006 for the tin-based bump finish. The Cu addition is typically 0.45–0.55 wt% in a 99.999 wt% Al base; this alloy reduces stress voiding at the pad-to-RDL corner compared with pure Al after multiple reflow passes, but it introduces a 0.3–0.6 V galvanic potential shift against immersion tin and ENIG pad finishes. The downstream production flow includes PVD barrier metal, AlCu 0.5 wt% sputtering, photoresist definition, plasma etch with BCl₃/Cl₂, wet post-etch residue removal in an inhibited solvent to prevent Cu pitting, passivation opening with a reticle that maintains a ≥5 µm overlap of AlCu over the final passivation edge, then electroless nickel/immersion gold or immersion tin deposition. Terminal products are fan-in WLCSP, fan-out packages for power management or RF front-end modules, and antenna-in-package substrates where the AlCu layer functions as both electrical routing and mechanical anchor for the solder interconnection. The documented failure threshold is a re-entrant passivation profile combined with chloride contamination above 0.5 µg/cm²; at that condition, AlCu RDL corrosion can open a 25 µm line in less than 96 h of biased humidity testing, so upstream cleaning is specified with ion chromatography after residue removal. Production-scale equipment behavior shows that the AlCu 0.5 wt% process is more sensitive to chamber conditioning than pure Al; after target replacement, the first 5 wafers processed before full chamber outgassing can exhibit a 10–15% upward shift in sheet resistance because residual water vapor oxidizes the Cu-rich phase and alters the etch taper angle.

For electroluminescent lamp electrodes and LED/VCSEL reflective contacts, the aluminum alloy film must maintain optical reflectance above 85% at 550 nm after 300 °C die-bond annealing, a requirement that excludes heavily Si-precipitated alloys and drives selection toward 5N Al or AlSiCu 1.0/0.5 wt% with controlled second-phase density. The industry compliance standard for optical thin-film characterization is ISO 9211-1:2010 for optical coating specifications, with cleanliness of the PVD chamber validated under ISO 14644-1:2015 Class 5; the downstream lamp or package is assessed by RoHS 2011/65/EU. The formulation addition ratio for the reflective electrode is either pure Al 99.999 wt% for lowest absorption or AlSiCu with Si 0.9–1.1 wt% and Cu 0.45–0.55 wt% for wire-bond-compatible reflectors, with a sputtered thickness of 150–500 nm. The production process uses DC or RF magnetron sputtering onto GaAs, sapphire, or flexible polyester/ITO substrates, followed by lithographic patterning or shadow-mask definition, metal liftoff in acetone or NMP, and thermal stabilization at 250–350 °C in forming gas at 5% H₂ to stabilize ohmic contact resistance. Terminal products include flexible EL lamps, VCSEL arrays with top-emitting contacts, LED flip-chip reflectors, and optoelectronic sensor readout circuits where the aluminum layer acts as both reflector and current-spreading electrode. The process constraint is that pure Al reflectors on polymer substrates must be kept below 120 °C during sputtering to avoid outgassing-induced adhesion loss, while AlSiCu reflectors require a 10–20 nm Ti or TiN barrier against indium migration from ITO if the film is annealed above 250 °C for more than 30 min. Published data for this specific configuration is limited for very thin 150 nm AlSiCu on flexible substrates, but the observed production failure is not reflectance loss alone; it is a mixed-mode adhesion failure at the polyester surface when the web speed exceeds 2 m/min and the water vapor partial pressure in the sputter chamber remains above 5×10⁻⁶ mbar during deposition.