In high-density fan-out wafer-level packaging, dry-etch BCB resin is applied as a non-photosensitive interlayer dielectric over copper redistribution traces and embedded die surfaces. The starting solution typically contains 35–46 wt% solids in mesitylene, producing kinematic viscosities between 800 cSt and 1500 cSt at 25°C. An organosilane adhesion promoter is dispensed first, followed by dynamic spin coating at 500–3000 rpm to build cured film thicknesses from 7 µm to 15 µm. Soft bake is performed on a proximity hot plate at 100–120°C for 120 s; inadequate solvent removal or excessive ramp rates of >30°C/min can skin over the surface and trap mesitylene, causing blistering during cure. The cure is carried out in a nitrogen-purged horizontal oven at 210°C for 60 min, with oxygen held below 100 ppm. Via patterning uses a positive photoresist mask and reactive ion etching in a CF4/O2 plasma, with oxygen flow adjusted between 20% and 50% of total gas volume depending on sidewall slope requirements. The etch step is followed by a low-power argon–oxygen descum at 50–100 W to remove fluoropolymer residue from exposed copper pads. Adhesion is verified by ASTM D3359 cross-hatch testing, with acceptable interconnect passivation requiring 4B or higher after 1000 thermal cycles of JEDEC JESD22-A104 condition B. The cured film has a dielectric constant of approximately 2.65 at 1 MHz per ASTM D150 and volume resistivity above 10^19 Ω·cm per ASTM D257. This layer serves as a low-k interlayer dielectric in fan-out panel-level and wafer-level redistribution structures for application processors, power-management integrated circuits, and RF transceivers operating through SAC305 reflow at 260°C.

What Limits Oxygen Uptake in BCB Cure Ambient for GaN HEMT Passivation?

GaN HEMT and GaAs pHEMT front-end processing use dry-etch BCB for passivation and interlayer dielectric integration over SiN protective layers because the cured polymer exhibits a loss tangent near 0.0008 and a dielectric constant of 2.65 when measured by split-post dielectric resonator methods conforming to IEC 61189-2-721. The deposition sequence after front-side ohmic and Schottky contact formation begins with a dilute ammonium hydroxide-based native oxide removal, followed by dehydration baking at 150°C for 30 min in nitrogen. BCB is spin coated to 5–10 µm, soft baked at 100–120°C, and then cured at 250°C for 60 min under oxygen levels below 50 ppm; oxygen ingress during cure darkens the film and raises high-frequency loss by generating chromophoric oxidation products. Via openings over gate, source, and drain pads are dry etched in an SF6/O2 inductively coupled plasma, with optical emission tracking of fluorine at 704 nm used to stop on a plasma-enhanced chemical vapour deposition silicon nitride layer. The absence of ionic additives in BCB supports MIL-STD-883 method 5011 ionic cleanliness evaluation, and wire-bond pull strength after Au stud bumping typically remains within the acceptance limits of MIL-STD-883 method 2011. The passivation layer is integrated into millimetre-wave power amplifiers, low-noise amplifiers, and antenna switch modules for 5G and satellite communication terminals.

Through-Silicon Via Liner Dielectric and Via-Reveal Etch Selectivity

In via-middle and via-first through-silicon via flows, dry-etch BCB is coated as a sidewall liner after deep reactive ion etching of silicon vias with aspect ratios up to 8:1. Spin application under vacuum assistance achieves top-side thickness of 2–5 µm, but sidewall coverage at aspect ratios above 10:1 can fall below 30% of top-side thickness, a limitation documented in tool qualification data from automated vacuum-coating systems. The coated wafer is ramped at 5°C/min to 210°C and held for 60 min in a nitrogen-purged batch furnace with <100 ppm oxygen. After front-side processing, wafer backside thinning exposes the via by silicon etch, and the BCB liner is removed from the copper pillar by SF6/O2 reactive ion etching with a selectivity to silicon dioxide of approximately 3:1. The remaining cuff suppresses copper drift and capacitive coupling between adjacent vias because the cured dielectric has a breakdown strength above 3 MV/cm per ASTM D149. Reliability is assessed by JEDEC JESD22-A104 thermal cycling from -55°C to 125°C, with electrical continuity and leakage below 1×10^-9 A required for high-bandwidth memory stacks and 2.5D interposer products.

When Panel-Level Embedded Die Requires a Gap-Fill Dielectric

For chip-first panel-level embedding, high-solids dry-etch BCB formulations containing 63 wt% solids are slit-coated or spray-coated over die placed on 600 mm × 600 mm glass or organic carriers. The target dry thickness of 25–40 µm is required to cover die edges and passivecomponent height differences while maintaining planarity for subsequent copper metallization. The cure protocol uses a vacuum bake at 100°C for 30 min to extract residual mesitylene, followed by 150°C for 30 min and 210°C for 60 min, with a slow cooling ramp of 2°C/min to prevent panel warpage caused by the 42 ppm/°C coefficient of thermal expansion and 2.9 GPa modulus of the cured resin. Openings over embedded die pads are dry etched in CF4/O2 plasma using an inductively coupled source at 13.56 MHz, with downstream optical emission end-point detection preventing oxidation of exposed copper. Warpage after thermal cycling per IPC-6012 class 3 requirements must remain below 0.5% panel diagonal span. Resulting coreless panels are used for automotive radar modules, compact power management modules, and embedded passives.

MEMS wafer-level packaging employs dry-etch BCB as both planarization dielectric and vacuum-compatible bonding adhesive. For bonding, the resin is applied to one wafer at 1–3 µm thickness, soft baked at 100°C, then contacted to a second substrate under 1–3 bar pressure at 200–250°C in a vacuum chamber. The bond line tolerates topographical steps up to 2 µm and produces outgassing below 0.1% mass loss when tested by MIL-STD-883 method 5011. Before bonding, cavities are opened in the sacrificial dielectric by CF4/O2 reactive ion etching, with sidewall angles controlled between 60° and 80° by adjusting oxygen fraction from 30% to 50%. The low moisture absorption of <0.2% by ASTM D570 and low ionic content maintain resonator vacuum stability in inertial measurement units, microbolometers, and micromirror arrays. A process boundary exists below 10 µm bond ring width where voiding at the cavity perimeter can exceed 5% of interface area, requiring ultrasonic scanning microscopy for lot acceptance.

High-Voltage Edge Termination Requires Ionic Purity Below 5 ppm

Silicon carbide and silicon IGBT power devices use dry-etch BCB as an edge-termination passivation layer over junction curvature regions. The coating is spin applied over mesa topographies of 10–20 µm to produce an 8–12 µm conformal build, with soft bake on a hot plate at 120°C and cure at 250°C for 60 min in <50 ppm oxygen. The cured coating has a breakdown strength above 3 MV/cm per ASTM D149 and a CTE of 42 ppm/°C, which is higher than that of 4H-SiC at 3.2 ppm/°C but lower stress than inorganic silicon dioxide laminates. Ionic purity is controlled below 5 ppm total extractable chloride, sodium, and potassium, as measured after 100°C deionized water extraction using ion chromatography. Alkali contamination above this threshold is known to reduce high-temperature reverse bias avalanche stability on 1200 V SiC MOSFETs. The dry-etch BCB is opened over aluminium or copper bond pads with CF4/O2 plasma, followed by oxygen ashing that must not exceed 100°C substrate temperature to prevent top-metal oxidation and wire-bond strength loss. Finished modules are used in traction inverters, industrial motor drives, and photovoltaic string inverters.

In acoustic-wave filter packaging, dry-etch BCB is deposited as a low-loss cap and cavity encapsulation over surface acoustic wave and bulk acoustic wave resonators. The cured film thickness is held between 3 µm and 6 µm, because thicker caps introduce mechanical damping that reduces electromechanical coupling, while thinner caps risk moisture ingress across the active interdigital transducer. The coating is applied by spin or spray methods, vacuum baked at 100°C for 30 min, and cured at 210°C for 60 min with oxygen below 100 ppm. Outgassing during cure is a critical process boundary; solvent residue above 1% of film mass can redeposit on interdigital transducer fingers and shift resonant frequencies by more than 0.1%. Vias to bond pads are formed by CF4/O2 reactive ion etching with endpoint detection on aluminium pads. The packaged filters are tested for moisture sensitivity level 1 per IPC/JEDEC J-STD-020, and laminate warpage after reflow is checked against JESD22-B112. These components are integrated into smartphone duplexers, multiplexers, and Wi-Fi front-end filters.